MT92220BG Zarlink Semiconductor, MT92220BG Datasheet - Page 17

• Manufacturer Part Number: MT92220BG
• Description: Description = 1023 Channel Voice Over IP/AAL2 Processor ;; Package Type = Epbga ;; No. Of Pins = 608
• Manufacturer: Zarlink Semiconductor

Data Sheet
1.5
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1.6
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1.7
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Proprietary Adaptive Silence Suppression
Supported in both PCM and ADPCM formats
Built-in detection of energy level
Padding with matched-energy comfort noise
64 tone buffers used to generate tones (1 byte to 64Kb each)
32 large comfort noise buffers (16Kb to 64Kb)
Suppression indication can be generated by chip or fed externally to synchronize with off-chip compression
CODEC
Fully H.110 compatible
H.110 Master and Slave capability
Support of message channel
Low Latency Loop-back (H.110 to H.110) of 128 channels (delay <= 375 us)
Redundant Adaptive Clock Recovery Circuit
Support of 2/4/8 MHz bus speed in groups of 4 streams (8 separate groups)
Generation of H.110 compatibility signals
Dual ct_netref signals
Programmable fsync and TDM clocks for compatibility with other TDM buses
Support of plain PCM in u-law and A-law
Translation between u-law and A-law on a per connection basis
Support of ADPCM at 40, 32, 24 or 16 kbps
Dual time-slot mode allows dynamic, error-free switching between PCM and ADPCM formats with silence
suppression
Support of HDLC encapsulated mini-packets with asynchronous timing
Support of HDLC streams ranging from 1 to 2046 time slots
Support of HDLC packets with optional Address byte or word, optional Control byte and optional 16-bit
CCITT-CRC
Routing of HDLC streams according to HDLC address byte, with up to 512 channels per stream
Support of HDLC packets up to 1500 bytes in length
Silence Suppression and Padding
H.110 Interface
TDM data formats
Zarlink Semiconductor Inc.
MT92220
17