MSC8101ADS Freescale Semiconductor / Motorola, MSC8101ADS Datasheet - Page 62

• Manufacturer Part Number: MSC8101ADS
• Description: MSC8101 APP DEV SYSTEM
• Manufacturer: Freescale Semiconductor / Motorola

Physical and Electrical Specifications
Figure 2-17 shows Host DMA write timing.
2.6.7
2-22
Note:
No.
No.
39
17
18
19
20
21
22
23
41
FCC, SCC, SMC, SPI, I
FCC input set-up time before low-to-high clock transition
FCC input hold time after low-to-high clock transition
SCC/SMC/SPI/I
SCC/SMC/SPI/I
TDM input set-up time before low-to-high serial clock transition
TDM input hold time after low-to-high serial transition
PIO/TIMER/DMA input set-up time before low-to-high serial clock transition
PIO/TIMER/DMA input hold time after low-to-high serial clock transition
FCC output delay after low-to-high clock transition
a. internal clock (BRGxO)
b. external clock (serial clock input)
a. internal clock (BRGxO)
b. external clock (serial clock input)
a. internal clock (BRGxO)
b. external clock (serial clock input)
a. internal clock (BRGxO)
b. external clock (serial clock input)
a. internal clock (BRGxO)
b. external clock (serial input clock)
CPM Timings
2
2
C input set-up time before low-to-high clock transition
C input hold time after low-to-high clock transition
Figure 2-17.
2
C are Non-Multiplexed Serial Interface signals.
HD[0–15]
(Output)
(Output)
HREQ
Table 2-21.
HACK
Table 2-20.
Host DMA Write Timing Diagram, HPCR[OAD] = 0
Characteristic
MSC8101 Technical Data, Rev. 19
Characteristic
64
CPM Output Characteristics
CPM Input Characteristics
TX[0–3]
47
Write
45
Data
Valid
46
63
48
Min
0
2
Freescale Semiconductor
Typical
Max
18
10
20
10
6
5
0
3
5
0
5
5
5
3
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns