MSC8101ADS Freescale Semiconductor / Motorola, MSC8101ADS Datasheet - Page 6

• Manufacturer Part Number: MSC8101ADS
• Description: MSC8101 APP DEV SYSTEM
• Manufacturer: Freescale Semiconductor / Motorola

Signals/Connections
1-2
Note:
SEL[0–2]
BNK-
Refer to the System Interface Unit (SIU) chapter in the MSC8101 Reference Manual for details on how to configure these pins.
see Figure 1-2
For the signals
multiplexed on
EOnCE Event
Ports A–D,
EE[2–3]
EE[4–5]
TC[0–2]
EED
EE0
EE1
PC[31–22, 15–12, 7–4]
PD[31–29, 19–16, 7]
SPARE1, SPARE5
Configuration
MODCK[1–3]
THERM[1–2]
GNDSYN1
PB[31–18]
PORESET
RSTCONF
VCCSYN1
BTM[0–1]
GNDSYN
PA[31–6]
VCCSYN
CLKOUT
HRESET
SRESET
DBREQ
RESET
CLKIN
Figure 1-1.
Port A
Port B
Port C
Port D
DLLIN
VDDH
TRST
TEST
GND
VDD
TMS
TDO
TCK
HPE
TDI
MSC8101 Technical Data, Rev. 19
→ 14
→ 25
→
→
→ 37
→
→
↔ 26
↔ 14
↔ 18
↔
→
→
→
→
←
↔
↔
↔
↔
↔
→
→
↔
↔
→
→
←
→
→
↔
↔
1
1
1
1
8
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
3
1
1
1
2
2
P
O
W
E
R
C
P
M
I
/
O
P
O
R
T
S
J
T
A
G
MSC8101 External Signals
M
M
B
U
S
E
C
6
0
x
32
32
16
5
4
1
1
3
1
1
1
1
1
1
1
1
4
1
1
1
1
1
1
1
1
1
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
1
2
1
1
8
1
1
1
1
1
1
↔ A[0–31]
↔ TT[0–4]
↔ TSIZ[0–3]
↔ TBST
↔ IRQ1
→ Reserved
↔ BR
↔ BG
↔ ABB
↔ TS
↔ AACK
← ARTRY
↔ DBG
↔ DBB
↔ D[0–31]
↔ D[32–47]
↔ D[48–51]
↔ D52
↔ D53
↔ D54
↔ D55
↔ D56
↔ D57
↔ D58
↔ D59
↔ D60
↔ D[61–63]
← Reserved
↔ IRQ1
↔ IRQ2
↔ IRQ3
↔ IRQ4
↔ IRQ5
↔ IRQ6
↔ IRQ7
↔ TA
↔ TEA
← NMI
→ NMI_OUT
↔ PSDVAL
↔ IRQ7
→ CS[0–7]
→ BCTL1
→ BADDR[27–28]
→ ALE
→ BCTL0
→ PWE[0–7]
→ PSDA10
→ PSDWE
→ POE
→ PSDCAS
↔ PGTA
→ PSDAMUX
GBL
BADDR[29–31]
IRQ2
IRQ3
HD[0–15]
HA[0–3]
HCS1
Single DS
Single HR
HDSP
HDDS
H8BIT
HCS2
Reserved
DP0
DP1
DP2
DP3
DP4
DP5
DP6
DP7
INT_OUT
PSDDQM[0–7]
PUPMWAIT
HRW
HDS/HDS
HREQ/HREQ
HACK/HACK
HDI16 Signals
Double DS
HRD/HRD
Double HR
HTRQ/HTRQ
HRRQ/HRRQ
Reserved
IRQ1
Reserved
Reserved
DREQ3
DREQ4
DACK3
DACK4
PSDRAS
PPBS
Freescale Semiconductor
HWR/HWR
IRQ[2–3, 5]
EXT_Br2
EXT_BG2
EXT_DBG2
EXT_BR3
EXT_BG3
EXT_DBG3
IRQ6
IRQ7
PBS[0–7]
PGPL0
PGPL1
PGPL2
PGPL3
PGPL4
PGPL5