MSC8101ADS Freescale Semiconductor / Motorola, MSC8101ADS Datasheet - Page 50

• Manufacturer Part Number: MSC8101ADS
• Description: MSC8101 APP DEV SYSTEM
• Manufacturer: Freescale Semiconductor / Motorola

Physical and Electrical Specifications
2.6.4.2 Power-On Reset Flow
Asserting the
Note:
As Table 2-13 shows, the MSC8101 has five configuration pins, four of which are multiplexed with the SC140
EONCE Event (
rising edge of
MSC8101. The signals on these pins and the MODCK_H value in the Hard Reset Configuration Word determine
the PLL locking mode, by defining the ratio between the DSP clock, the bus clocks, and the CPM clock
frequencies.
2-10
RSTCONF
DBREQ/ EE0
HPE/EE1
BTM[0–1]/
EE[4–5]
No.
1
2
3
4
5
Pin
Required external PORESET duration minimum
•
•
Delay from deassertion of external PORESET to deassertion of
internal PORESET
•
•
Delay from deassertion of internal PORESET to SPLL lock
•
•
Delay from SPLL lock to DLL lock
•
•
Delay from SPLL lock to HRESET deassertion
•
•
PORESET
CLKIN = 18 MHz
CLKIN = 75 MHz
CLKIN = 18 MHz
CLKIN = 75 MHz
SPLLMFCLK = 18 MHz
SPLLMFCLK = 25 MHz
DLL enabled
— BCLK = 18 MHz
— BCLK = 75 MHz
DLL disabled
DLL enabled
— BCLK = 18 MHz
— BCLK = 75 MHz
DLL disabled
— BCLK = 18 MHz
— BCLK = 75 MHz
Reset Configuration
Input line sampled by the MSC8101 at the rising edge of
PORESET.
EONCE Event Bit 0
Input line sampled after SC140 core PLL locks. Holding EE0
high when PORESET is deasserted puts the SC140 into
Debug mode.
Host Port Enable
Input line sampled at the rising edge of PORESET. If
asserted, the Host port is enabled, the system data bus is
32-bit wide, and the Host must program the reset
configuration word.
Boot Mode
Input lines sampled at the rising edge of PORESET, which
determine the MSC8101 Boot mode.
PORESET
PORESET
EE[0–1]
and
TRST
,
. In addition to these configuration pins, three (
external pin initiates the power-on reset flow.
EE[4–5]
Characteristics
must be asserted externally for the duration of the power-up sequence.
) pins and the fifth of which is the
Description
Table 2-13.
MSC8101 Technical Data, Rev. 19
Table 2-14.
External Configuration Signals
Reset Timing
0
1
0
1
0
1
00
01
10
11
RSTCONF
Reset Configuration Master.
Reset Configuration Slave.
SC140 starts the normal processing
mode after reset.
SC140 enters Debug mode immediately
after reset.
Host port disabled (hardware reset
configuration enabled).
Host port enabled.
MSC8101 boots from external memory.
MSC8101 boots from HDI16.
Reserved.
Reserved.
800 / SPLLMFCLK
Expression
1024 / CLKIN
MODCK[1–3]
3073 / BLCK
3585 / BLCK
512 / BLCK
16 / CLKIN
—
pin. These pins are sampled at the
) pins are sampled by the
Settings
888.8
213.3
Min
Freescale Semiconductor
170.72
199.17
56.89
13.65
40.97
44.4
32.0
47.5
28.4
6.83
0.0
Max
—
—
Unit
ns
ns
μs
μs
μs
μs
μs
μs
ns
μs
μs
μs
μs