ST72345C4 STMicroelectronics, ST72345C4 Datasheet - Page 58

• Manufacturer Part Number: ST72345C4
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72345C4

• Up To 16 Kbytes Program Memory: single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
• 256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
• 5 Power-saving Modes: Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
• 16-bit Timer A With: 1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

Interrupts
8.5.2
Caution:
58/247
Interrupt software priority registers (ISPRX)
Reset value: 1111 1111 (FFh)
These four registers contain the interrupt software priority of each interrupt vector.
●
Table 15.
●
●
The reset, and TRAP vectors have no software priorities. When one is serviced, the I1 and
I0 bits of the CC register are both set.
If the I1_x and I0_x bits are modified while the interrupt x is executed the following behavior
has to be considered: If the interrupt x is still pending (new interrupt or flag not cleared) and
the new software priority is higher than the previous one, the interrupt x is re-entered.
Otherwise, the software priority stays unchanged up to the next interrupt request (after the
IRET of the interrupt x).
Table 16.
HALT
IRET
JRM
JRNM
POP CC
Instruction
Each interrupt vector (except reset and TRAP) has corresponding bits in these
registers where its own software priority is stored. This correspondence is shown in the
following table.
Each I1_x and I0_x bit value in the ISPRx registers has the same meaning as the I1
and I0 bits in the CC register.
Level 0 can not be written (I1_x=1, I0_x=0). In this case, the previously stored value is
kept. (example: previous = CFh, write = 64h, result = 44h)
ISPR0
ISPR1
ISPR2
ISPR3
Interrupt vector addresses
Dedicated interrupt instruction set
Vector address
Entering Halt mode
Interrupt routine return
Jump if I1:0=11 (level 3)
Jump if I1:0<>11
Pop CC from the stack
FFFBh-FFFAh
FFE1h-FFE0h
FFF9h-FFF8h
I1_11
I1_3
I1_7
1
7
Read/Write (bits 7:4 of ISPR3 are read only)
New description
...
I0_11
I0_3
I0_7
1
Doc ID 12321 Rev 5
I1_10
I1_2
I1_6
1
Mem => CC
Pop CC, A, X, PC
I1:0=11 ?
I1:0<>11 ?
Function/example
I0_10
I0_2
I0_6
1
I1_13
I1_1
I1_5
I1_9
I1_13 and I0_13 bits
I1_0 and I0_0 bits*
I1_1 and I0_1 bits
ISPRx bits
1
I0_13
I1
I1
I1
I0_1
I0_5
I0_9
ST72344xx ST72345xx
...
H
H
H
0
I0
I0
I0
I1_12
I1_0
I1_4
I1_8
N
N
N
Z
Z
Z
I0_12
I0_0
I0_4
I0_8
0
C
C
C