ST72345C4 STMicroelectronics, ST72345C4 Datasheet - Page 176

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ST72345C4

Manufacturer Part Number
ST72345C4
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72345C4

Up To 16 Kbytes Program Memory
single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
5 Power-saving Modes
Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
16-bit Timer A With
1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
On-chip peripherals
11.7.6
176/247
Figure 80. Random read (dummy write + stop + start + current address read)
Figure 81. Sequential read
Figure 82. Combined format for read
Legend: SA - Slave Address, BA - Byte Address, W: Write, R: Read
Low-power modes
Table 68.
Start
Wait
Halt
Active-halt
Mode
Start
Start
SA
No effect on I
I2C interrupts causes the device to exit from Wait mode.
I
In Halt mode, the I
The I
“exit from Halt mode” capability.
I
In Active halt mode, the I
bus. The I
with “exit from Active-halt mode” capability.
Mode description
2
2
C registers are frozen.
C registers are frozen.
SA
SA
2
C interface resumes operation when the MCU is woken up by an interrupt with
W
Ack
2
R
C interface resumes operation when the MCU is woken up by an interrupt
R
2
C interface.
Ack Data
Ack
BA
2
C interface is inactive and does not acknowledge data on the bus.
Doc ID 12321 Rev 5
Data
Ack
2
C interface is inactive and does not acknowledge data on the
Nack
Stop
Ack
Restart
Start
Data
Description
SA
SA
Ack
R Ack
R
Data Nack
Ack
Data
ST72344xx ST72345xx
Data
Nack
Nack
Stop
Stop
Stop

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