SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 648

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

32.7.13
Name:
Addresses:
Access:
CUPD: Channel Update Register
This register acts as a double buffer for the period or the duty cycle. This prevents an unexpected waveform when modify-
ing the waveform period or duty-cycle.
Only the first 16 bits (internal channel counter size) are significant.
When CPD field of PWM_CMRx register = 0, the duty-cycle (CDTY of PWM_CDTYx register) is updated with the CUPD
value at the beginning of the next period.
When CPD field of PWM_CMRx register = 1, the period (CPRD of PWM_CPRDx register) is updated with the CUPD value
at the beginning of the next period.
648
31
23
15
7
SAM3N
PWM Channel Update Register
30
22
14
0x40020210 [0], 0x40020230 [1], 0x40020250 [2], 0x40020270 [3]
6
PWM_CUPD[0..3]
Write-only
29
21
13
5
28
20
12
4
CUPD
CUPD
CUPD
CUPD
27
19
11
3
26
18
10
2
25
17
9
1
11011A–ATARM–04-Oct-10
24
16
8
0