SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 333

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SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
23. Clock Generator
23.1
23.2
11011A–ATARM–04-Oct-10
Description
Embedded Characteristics
The Clock Generator User Interface is embedded within the Power Management Controller and
is described in
the Clock Generator registers are named CKGR_.
The Clock Generator is made up of:
It provides the following clocks:
• A Low Power 32,768 Hz Slow Clock Oscillator with bypass mode
• A Low Power RC Oscillator
• A 3 to 20 MHz Crystal or Ceramic Resonator-based Oscillator which can be bypassed
• A factory programmed Fast RC Oscillator, 3 output frequencies can be selected: 4, 8 or
• A 60 to 130 MHz programmable PLL (input from 3.5 to 20 MHz), capable of providing the
• SLCK, the Slow Clock, which is the only permanent clock within the system
• MAINCK is the output of the Main Clock Oscillator selection: either the Crystal or Ceramic
• PLLCK is the output of the Divider and 60 to 130 MHz programmable PLL
12 MHz. By default 4 MHz is selected.
clock MCK to the processor and to the peripherals.
Resonator-based Oscillator or 4/8/12 MHz Fast RC Oscillator
Section 24.15 ”Power Management Controller (PMC) User
Interface”. However,
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