MCP3901A0T-E/ML Microchip Technology, MCP3901A0T-E/ML Datasheet - Page 42

• Manufacturer Part Number: MCP3901A0T-E/ML
• Description: IC AFE 24BIT 64KSPS 2CH 20QFN
• Manufacturer: Microchip Technology
• Series: -r

Specifications of MCP3901A0T-E/ML

• Number Of Bits: 24
• Number Of Channels: 2
• Power (watts): -
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Package / Case: 20-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP3901
7.1
The ADC Channel Data Output registers always
contain the most recent A/D conversion data for each
channel. These registers are read-only. They can be
accessed independently or linked together (with
READ<1:0> bits). These registers are latched when an
REGISTER 7-1:
DS22192D-page 42
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 23-0
DATA_CHn
DATA_CHn
DATA_CHn
<23>
<15>
R-0
R-0
R-0
<7>
ADC Channel Data Output
Registers
DATA_CHn<23:0>
DATA_CHn
DATA_CHn
DATA_CHn
<22>
<14>
R-0
R-0
R-0
<6>
CHANNEL OUTPUT REGISTERS: ADDRESS 0x00-0x02: CH0; 0x03-0x05; CH1
W = Writable bit
‘1’ = Bit is set
DATA_CHn
DATA_CHn
DATA_CHn
<21>
<13>
<5>
R-0
R-0
R-0
DATA_CHn
DATA_CHn
DATA_CHn
<20>
<12>
<4>
R-0
R-0
R-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DATA_CHn
DATA_CHn
DATA_CHn
ADC read communication occurs. When a data ready
event occurs during a read communication, the most
current ADC data is also latched to avoid data
corruption issues. The three bytes of each channel are
updated synchronously at a DRCLK rate. The three
bytes can be accessed separately, if needed, but are
refreshed synchronously.
<19>
<11>
<3>
R-0
R-0
R-0
DATA_CHn
DATA_CHn
DATA_CHn
<18>
<10>
<2>
R-0
R-0
R-0
© 2011 Microchip Technology Inc.
x = Bit is unknown
DATA_CHn
DATA_CHn
DATA_CHn
<17>
<9>
<1>
R-0
R-0
R-0
DATA_CHn
DATA_CHn
DATA_CHn
<16>
R-0
R-0
<8>
R-0
<0>
bit 16
bit 8
bit 0