MCP3901A0T-E/ML Microchip Technology, MCP3901A0T-E/ML Datasheet - Page 4

• Manufacturer Part Number: MCP3901A0T-E/ML
• Description: IC AFE 24BIT 64KSPS 2CH 20QFN
• Manufacturer: Microchip Technology
• Series: -r

Specifications of MCP3901A0T-E/ML

• Number Of Bits: 24
• Number Of Channels: 2
• Power (watts): -
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Package / Case: 20-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP3901
ELECTRICAL CHARACTERISTICS (CONTINUED)
DS22192D-page 4
Electrical Specifications: Unless otherwise indicated, AV
MCLK = 4 MHz; PRESCALE = 1; OSR = 64; GAIN = 1; Dithering OFF; V
Output Data Rate
Analog Input Absolute Voltage
on CH0+, CH0-, CH1+,
CH1- Pins
Analog Input Leakage Current
Differential Input Voltage Range (CHn+ – CHn-)
Offset Error
Offset Error Drift
Gain Error
Gain Error Drift
Integral Nonlinearity
Input Impedance
Signal-to-Noise and Distortion
Ratio
Total Harmonic Distortion
(Notes
Signal-to-Noise Ratio
(Notes
Spurious Free Dynamic Range
(Note
Crosstalk (50/60 Hz)
Note 1:
(Notes
2)
2:
3:
4:
5:
6:
7:
8:
2, 3)
2, 3)
Parameters
(Note
This specification implies that the ADC output is valid over this entire differential range and that there is no
distortion or instability across this input range. Dynamic performance is specified at -0.5 dB below the
maximum signal range, V
See terminology section for definition.
This parameter is established by characterization and not 100% tested.
For these operating currents, the following bit settings apply: SHUTDOWN<1:0> = 00, RESET<1:0> = 00,
VREFEXT = 0, CLKEXT = 0.
For these operating currents, the following Configuration bit settings apply: SHUTDOWN<1:0> = 11,
VREFEXT = 1, CLKEXT = 1.
Applies to all gains. Offset error is dependant on PGA gain setting (see
Outside of this range, the ADC accuracy is not specified. An extended input range of ±6V can be applied
continuously to the part with no risk for damage.
For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with
BOOST bits off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz,
AMCLK = MCLK/PRESCALE. When using a crystal, the CLKEXT bit should be equal to ‘0’.
(Note
2, 3)
2)
2)
(Note
(Note
2)
2)
IN
Symbol
SINAD
CTALK
SFDR
CHn+
SNR
THD
V
= -0.5 dBFS @ 50/60 Hz = 353 mV
INL
A
GE
Z
f
OS
D
IN
IN
Min
-2.5
350
—
—
—
—
—
—
—
89
78
—
—
89
80
—
—
—
-1
-3
DD
See
= 4.5 to 5.5V, DV
Typical
-104
-133
Table 4-2
-0.4
109
-85
—
—
—
—
15
—
91
79
91
81
87
1
2
3
1
IN
500/GAIN
RMS,
= -0.5 dBFS = 333 mV
Max
+2.5
-102
-84
+1
+3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DD
V
REF
= 2.7 to 5.5V; -40°C < T
Figure 2-19
= 2.4V.
ppm/°C From -40°C to +125°C
µV/°C
Units
ksps
ppm
mV
mV
nA
nA
kΩ
dB
dB
dB
dB
dB
dB
dB
dB
dB
%
%
V
© 2011 Microchip Technology Inc.
for typical values).
f
OSR = MCLK/
(4 x PRESCALE x OSR)
All analog input
channels, measured to
AGND
(Note
-40°C < T
(Note
(Note
G = 1
All Gains
GAIN = 1,
DITHER = On
Proportional to
1/AMCLK
OSR = 256,
DITHER = On
OSR = 256,
DITHER = On
OSR = 256,
DITHER = On
DITHER = On
OSR = 256,
DITHER = On
From -40°C to +125°C
OSR = 256,
D
RMS
= DRCLK = DMCLK/
Conditions
4)
1)
6)
@ 50/60 Hz
(Note
A
A
< +85°C,
< 125°C
7)