PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 228

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

10.3
10.3.1
10.3.1.1 Global Registers Overview
The DSCC4 global registers are used to configure and control the DMA controller,
central FIFOs and genral device functions.
The full 32 bit address location of each global register consists of:
• Base Address Register 0 (PCI Configuration Space, address location 10
• Register address offset, which is in the range 0000
All registers are 32-bit organized registers.
Table 43
Table 43
General registers:
0000
0004
0008
Interrupt Queue (IQ) specific registers (and FIFO Control 4 register):
000C
0010
0014
0018
001C
0020
0024
0028
002C
0030
0034
0038
Data Sheet
Offset
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
provides an overview about all global registers:
On-Chip Registers Description
Global Registers - Detailed Register Description
Register
GCMDR
GSTAR
GMODE
IQLENR0
IQLENR1
IQSCC0RXBAR
IQSCC1RXBAR
IQSCC2RXBAR
IQSCC3RXBAR
IQSCC0TXBAR
IQSCC1TXBAR
IQSCC2TXBAR
IQSCC3TXBAR
FIFOCR4
RESERVED
DSCC4 Global Register Overview
Meaning
Global Status Register
IQ SCC0 RX Base Address Reg.
IQ SCC1 RX Base Address Reg.
IQ SCC2 RX Base Address Reg.
IQ SCC3 RX Base Address Reg.
IQ SCC0 TX Base Address Reg.
IQ SCC1 TX Base Address Reg.
IQ SCC2 TX Base Address Reg.
IQ SCC3 TX Base Address Reg.
Global Command Register
Global Mode Register
IQ Length Register 0
IQ Length Register 1
FIFO Control Register 4
-
228
H
...00FC
Detailed Register Description
H
PEB 20534
PEF 20534
H
)
2000-05-30