VSC8641XKO Vitesse Semiconductor Corp, VSC8641XKO Datasheet - Page 99

• Manufacturer Part Number: VSC8641XKO
• Description: IC PHY 10/100/1000 100-LQFP
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8641XKO

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 2.5V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Case: TQFP
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1031

Table 85.
6.2.4
Table 86.
6.2.5
Table 87.
Revision 4.3
August 2009
SMI Pins (continued)
JTAG
The following table lists the device pins associated with the device JTAG testing facility.
JTAG Pins
Miscellaneous
The following table lists the device pins associated with a particular interface or facility
on the device.
Miscellaneous Pins
Pin
11
9
Pin
4
3
6
7
8
Pin
53
52
51
50
49
86
85
Name
CMODE4
CMODE3
CMODE2
CMODE1
CMODE0
XTAL1/REFCLK
XTAL2
Name
EECLK
NRESET
Name
TDI
TDO
TMS
TCK
NTRST
O
Type
CRYST
I
I
A
Type
O
I
Type
PU
I
I
I
I
ZC
PU5V
PU5V
PU5V
PU5V
Description
Configuration mode (CMODE) pins. For more information,
see
Crystal oscillator input. If OSCEN=high, then a 25 MHz
parallel resonant crystal with ±50 ppm frequency tolerance
should be connected across XTAL1 and XTAL2. A 33 pF
capacitor should also tie the XTAL1 pin to ground.
Reference clock input. If OSCEN=low, the clock input
frequency can either be 25 MHz (PLLMODE=0) or 125 MHz
(PLLMODE is high).
Crystal oscillator output. The crystal should be connected
across XTAL1 and XTAL2. A 33 pF capacitor should also tie
the XTAL2 pin to ground. If not using a crystal oscillator,
this output pin can be left floating if driving XTAL1/REFCLK
with a reference clock.
O
“CMODE,”
Description
(Optional) EEPROM Serial Output Clock. Used to
configure PHYs in a system without a station
manager. Connect to the SCL pin of the ATMEL
“AT24CXXX” serial EEPROM device family.
Device Reset. Active low input that powers down the
device and sets the register bits to their default
state.
Description
JTAG test serial data input.
JTAG test serial data output.
JTAG test mode select.
JTAG test clock input.
JTAG reset. If JTAG is not used, then tie this pin
to VSS (ground) with a pull-down resistor.
page 68.
VSC8641 Datasheet
Pin Descriptions
Page 99