VSC8641XKO Vitesse Semiconductor Corp, VSC8641XKO Datasheet - Page 7

• Manufacturer Part Number: VSC8641XKO
• Description: IC PHY 10/100/1000 100-LQFP
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8641XKO

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 2.5V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Case: TQFP
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1031

Figures
Revision 4.3
August 2009
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Figure 8.
Figure 9.
Figure 10. SMI Write Frame........................................................................................ 30
Figure 11. MDINT Configured as an Open-Drain (Active-Low) Pin..................................... 31
Figure 12. MDINT Configured as an Open-Source (Active-High) Pin .................................. 31
Figure 13. Far-End Loopback ...................................................................................... 35
Figure 14. Near-End Loopback .................................................................................... 35
Figure 15. Connector Loopback ................................................................................... 36
Figure 16. Test Access Port and Boundary-Scan Architecture ........................................... 38
Figure 17. Register Space Diagram .............................................................................. 40
Figure 18. EEPROM Read and Write Register Flow .......................................................... 72
Figure 19. JTAG Interface Timing ................................................................................ 83
Figure 20. SMI Interface Timing .................................................................................. 84
Figure 21. Reset Timing ............................................................................................. 85
Figure 22. GMII Transmit Timing ................................................................................. 86
Figure 23. GMII Receive Timing .................................................................................. 87
Figure 24. MII Transmit Timing ................................................................................... 87
Figure 25. MII Receive Timing..................................................................................... 88
Figure 26. RGMII Uncompensated Timing ..................................................................... 89
Figure 27. RGMII Compensated Timing ........................................................................ 91
Figure 28. Pin Diagram for VSC8641XJF ....................................................................... 94
Figure 29. Pin Diagram for VSC8641XKO and VSC8641XKO-03 ..................................... 104
Figure 30. Package Drawing for VSC8641XJF .............................................................. 115
Figure 31. Package Drawing for VSC8641XKO and VSC8641XKO-03............................... 116
Typical Application...................................................................................... 17
High-level Block Diagram ............................................................................ 19
RGMII or GMII to Cat5 Block Diagram........................................................... 20
RGMII MAC Interface .................................................................................. 21
GMII/MII MAC Interface .............................................................................. 22
Cat5 Media Interface .................................................................................. 23
Inline Powered Ethernet Switch Diagram ....................................................... 26
ActiPHY State ............................................................................................ 28
SMI Read Frame ........................................................................................ 29
VSC8641 Datasheet
Contents
Page 7