TP3420AV National Semiconductor, TP3420AV Datasheet - Page 24

• Manufacturer Part Number: TP3420AV
• Manufacturer: National Semiconductor

Specifications of TP3420AV

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

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Symbol
DIGITAL INTERFACES
V
V
V
V
V
V
I
I
LINE INTERFACES
R
CL
POWER DISSIPATION
I
I
TRANSMISSION PERFORMANCE
I
OZ
CC
CC
Electrical Characteristics
Unless otherwise noted: limits printed in bold characters are electrical testing limits at V
limits are design goals for V
are subject to change based on further characterization testing.
Note 24: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits.
Note 25: When the device is activated and driving a correctly terminated line, I
increases I
Note 26: The pulse amplitude at the L
in 50 .
Note 27: Using a 2:1 PE64995 transformer and a connecting cord. See AN-872 (TP3420A Line Interface or Circuit Considerations) for more details.
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
Voltage at L
Voltage at any Digital Input
IL
IH
ILX
IHX
OL
OH
Li
L0
CC
0
1
to GND
CC1
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Input Current
Output Current in High
Impedance State
(TRI-STATE)
Differential Input
Resistance
Load Capacitance
Power Down Current
Power Up Current
Transmit Pulse Amplitude
Transmit Pulse Unbalance
Input Pulse Amplitude
Output Impedance when
Transmitting Binary Zeroes
by approximately 8 mA.
i
, L
0
Parameter
CC
o
±
= 5.0V
pins allows for approximately 1 dB transformer insertion loss to meet the 0.75V pulse mask test when the line is terminated
V
V
±
CC
CC
5%, and T
All Digital Inputs
All Digital Inputs
MCLK/XTAL Input
MCLK/XTAL Input
B
All Other Digital Outputs, I
B
All Other Digital Outputs, I
All Outputs, I
Any Digital Input, GND
B
GND
GND
Between L
All Outputs Open-Circuit
As Above, Device Deactivated (Note 25)
R
0+ Relative to 0−
Differential Between L
50
400
+1V to GND −1V
+1V to GND −1V
r
r
r
L
, I
, I
, INT, LSD, CO
= 270
L
L
(Note 24)
Load
<
<
= 3.2 mA
= −3.2 mA
Load (Note 27)
V
L
A
i
OUT
+, L
= 0˚C to 70˚C. This data sheet is still preliminary and parameter limits
o
+ and L
Between L
L
i
−
<
= −100 µA
7V
Conditions
<
V
CC
V
CC1
o
24
CC
−
i
o
+ and L
increases by several mA. A worst-case data pattern, consisting of all binary 0’s,
+ and L
<
Storage Temperature Range
Current at L
Current at any Digital Output
Lead Temperature
ESD rating
V
L
L
(Soldering, 10 sec.)
IN
= 1 mA
= −1 mA
<
i
−
o
− (Note 26)
V
CC
0
CC
V
V
= 5.0V and T
CC
CC
±
±
Min
−10
−10
200
100
2.2
2.4
2.4
1.90
175
− 0.5
− 0.5
Limits
Typ
A
14
= 25˚C. All other
−65˚C to+150˚C
±
Max
1.20
200
0.7
0.5
0.4
2.14
10
10
25
±
5
±
±
100 mA
50 mA
2000V
300˚C
mVpk
Units
Vpk
mA
mA
k
µA
µA
pF
%
V
V
V
V
V
V
V
V