TP3420AV National Semiconductor, TP3420AV Datasheet - Page 19

• Manufacturer Part Number: TP3420AV
• Manufacturer: National Semiconductor

Specifications of TP3420AV

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

Functional Description
A 6x multiframe counter (30 ms) in the TP3420A is enabled
by the MFC6E command, and disabled with the MFC6D
command. When the counter is enabled (MFC6E), an inter-
rupt MFC is generated locally every 30 ms and internal logic
ensures that the MFT1L messages are transmitted 6 times
unless interrupted by an MFT1H message.
Alternatively, if the software chooses to keep count of repeti-
tions of transmitted multiframe messages, the command
MFC1E can be used to cause the interrupt MFC at every
multiframe boundary (5 ms). The 6x transmit logic is then
disabled. If both MFC6E and MFC1E commands are loaded,
the MFC1E command has precedence and causes the 1x
(5 ms) interrupt. It is expected that the user will prefer the
30 ms interrupt to control transmission of multiframe mes-
sages because it reduces the processor load considerably,
as outlined below and in examples in the Appendix A.
Software Table of SC1 Messages
The software in the NT should keep a table of SC1 mes-
sages to be communicated to the TE, and use the MFC (30
ms) interrupt as a synchronous timer to load SC1 messages.
Using X’3X command for SC1 messages, the software must
write the appropriate Low Priority message to the MFT1L
register within 30 ms of the interrupt. The message is then
transmitted on the next 6x multiframe boundary and is re-
peated 6 times. If the MFT1L register is not updated by a
new MICROWIRE command from the CPU within 30 ms, the
data from the MFT1L register is re-transmitted another 6
times.
(Continued)
19
Transmission of SC1H - High Priority Messages
In the NT mode, commands such as LP, FECV, and DTSE
are considered to be High Priority messages. These are
loaded through the MFT1H register and sent out once on the
next multiframe boundary. In the following multiframe this
message gets replaced with the contents of MFT1L, the Low
Priority Register. At every multiframe boundary, the device
checks whether the MFT1H register has a new message; if it
has, that message is sent once, otherwise the contents of
the MFT1L register are sent.
In TE modes on the receive side, the high priority messages
on the SC1 channel (LP, ST, FECV and DTSE) are accepted
as valid on the first occurrence and the MFR1 interrupt is
generated to indicate the status (see Table 8 ).
Transmission of QH - High Priority Messages
In TE modes, a Loss of Power condition is conveyed to the
NT by writing the LP command in the MFT1H register for a
“one shot” high priority message which overrides any other
Q channel message. Write the LP message in the MFT1L
register to ensure continuing transmission of the LP mes-
sages. Normal maintenance commands such as LB1 Re-
quest are written to the MFT1L register.
SC2 Channel Messages
With the MFC6E enabled, the TP3420A guarantees the 6x
transmission of SC2 messages according to the ANSI 1991
spec. The software should load an SC2 message in to the
MFT2 register within 30 ms of the MFC interrupt. The multi-
frame word for the SC2 stream is then transmitted on the
next 6x boundary and repeated 6 times. If the register is not
updated by another MFT2 message within 30 ms, then the
device will re-cycle the existing message in the SC2 register,
i.e. re-transmit it 6 times.
www.national.com