TP3420AV National Semiconductor, TP3420AV Datasheet - Page 15

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TP3420AV

Manufacturer Part Number
TP3420AV
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of TP3420AV

Number Of Line Interfaces
1
Control Interface
HDLC
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant

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Functional Description
MULTIFRAME TRANSMIT AND RECEIVE REGISTERS
MFT1L)
MFT1H)
MFT2)
MFR1)
MFR2)
MIE1)
MID1)
MID2)
MULTIFRAME MESSAGE REPETITION AND
VALIDATION
MFC1E)
MFC6E)
MFC1D)
MFC6D)
ENINT
DISINT
ENV)
DISV)
ENST)
DISST)
With the device in TE Mode, data entered in
M1, M2, M3 and M4 bits of MTF1L is
transmitted towards the NT in multiframe bit
positions Q1, Q2, Q3 and Q4 respectively.
With the device in NT Mode, data entered
(via MFT1L, MFT1H) in the M bit positions is
transmitted towards the TE in multiframe bit
positions S11, S12, S13 and S14
respectively. Data entered via MFT2
command in the M bit positions is
transmitted in multiframe bit positions S21,
S22, S23, S24 respectively. The Multiframe
Channel and Interrupts (MFR1, MFR2) must
be enabled by the MIE1, MIE2 to use these
channels. The MID1, MID2 commands will
disable the interrupts MFR1, MFR2 (and in
NT mode only, it will also disable the
multiframing clock to the TEs). See also the
section on Multiframe Maintenance Channel.
These commands control the frequency of
the MFC Interrupt that is used as an aid to
the software to transmit multiframe
commands. If both MFC1E and MFC6E
commands are set, then the MFC Interrupt
will occur every multiframe (5 ms). The
interrupt may be disabled with MFC1D,
MFC6D. The MFC6E command also enables
the internal 6 multiframe counter that
ensures that every MFT1L command is sent
for 6 consecutive multiframes before sending
another command loaded in the MFT1L
register. The MFC6D also disables the
internal 6 multiframe counter. See also the
section on Multiframe Maintenance Channel.
This command enables the RMFE and SLIP
interrupts and thus accesses new features of
TP3420A.
Disables RMFE and SLIP interrupts.
ENV enables the 3-times validation of certain
SC1/Q and SC2 channel messages ( Table
8 ) before generating the MFR1 and MFR2
interrupt respectively. DISV disables this
circuit so that the MFR1 and MFR2
interrupts are generated whenever there is a
change in the received multiframe word in
either channel.
ENST enables the state of the internal
Activation State machine to be reported to
the microcontroller by the NOCST response
to any MICROWIRE command thereafter.
The DISST causes the NOCST to be
replaced by the normal NOC status. See the
section on Activation State machine access.
(Continued)
15
PINDEF
ACTIVATION STATE MACHINE ACCESS
The TP3420A has a mechanism which allows the microcon-
troller to read the internal activation state of the chip. The MI-
CROWIRE command ENST (Enable Status) X’92 enables
the device state information to be output as a MICROWIRE
status word NOCST (1,S3,S2,S1,0,0,0,0) in response to any
subsequent MICROWIRE command. However, if a state
change interrupt occurs, e.g., an AP (Activation Pending)
then the interrupt status value is returned, otherwise the
NOCST status is returned. See Table 6 below to relate the
values of the S3, S2, S1 bits to internal activation state of the
device.
A clean way of monitoring the device state is to write a ENST
command, followed immediately by a DISST (Disable Sta-
tus) command. The NOCST status returned at the end of the
DISST contains the actual state of the device. Subsequent
MICROWIRE commands will be responded by NOC
(0,0,0,0,0,0,0,0). This method makes it easy for the software
to keep track of when to expect the device state via the
NOCST.
Another method would be to repeat the NOP command a
couple of times after a ENST command and observe that the
device state information (through the NOCST) is repeated to
be sure of the state of the device.
IDENTIFYING A TP3420A FROM A TP3420 DEVICE
The TP3420A on power-up default is functionally compatible
with a TP3420 device, and hence software written for a
TP3420 is applicable for a TP3420A device. Additional de-
vice features may be invoked by MICROWIRE commands. A
simple way of identifying a TP3420A from a TP3420 is as fol-
lows:
Upon application of power, write ENST followed by DISST
MICROWIRE commands to the device and evaluate the
NOCST status word. If the device is a TP3420A the value
should be 1000000, indicating the device is in F1/G0 state. A
TP3420 device will ignore the ENST/DISST commands and
return the normal NOC (00000000) status back.
MAINTENANCE LOOPBACKS
The TP3420A supports all the ANSI T1.605 and I.430 loop-
back modes and some additional loopback modes to allow
greater flexibility in performing fault isolation.
1. B1 digital loopback (using LBB1 command) with any
2. B2 digital loopback (LBB2) with any FSa/FSb relation-
G1.1
G1.2
FSa/FSb relationship in all TE or NT modes.
ship in all TE or NT modes.
NT
G1
G2
G3
TABLE 6. TP3420A Activation State Table
This command is used to choose alternate
pin functions on Pins 8 and 18. Please see
Table 1 for the selection values.
TE
F1
F2
F3
F4
F5
F6
F7
F8
S3
0
0
0
0
1
1
1
1
S2
0
0
1
1
0
0
1
1
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S1
0
1
0
1
0
1
0
1

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