PIC16F872-I/SP Microchip Technology Inc., PIC16F872-I/SP Datasheet - Page 87

• Manufacturer Part Number: PIC16F872-I/SP
• Description: 28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F872-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 64 Bytes
• Input Output: 22
• Interface: I2C/SPI
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

10.5
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS1:ADCS0 = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared and
the result loaded into the ADRES register. If the A/D
interrupt is enabled, the device will wake-up from
SLEEP. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
TABLE 10-2:
© 2006 Microchip Technology Inc.
0Bh,8Bh,
10Bh, 18Bh
0Ch
8Ch
1Eh
9Eh
1Fh
9Fh
85h
05h
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used for A/D conversion.
Note 1: These bits are reserved; always maintain clear.
Address
A/D Operation During SLEEP
INTCON
PIR1
PIE1
ADRESH A/D Result Register High Byte
ADRESL A/D Result Register Low Byte
ADCON0
ADCON1
TRISA
PORTA
Name
REGISTERS/BITS ASSOCIATED WITH A/D
ADCS1 ADCS0 CHS2
ADFM
Bit 7
GIE
(1)
(1)
—
—
PEIE
ADIF
ADIE
Bit 6
—
—
—
TMR0IE
PORTA Data Direction Register
PORTA Data Latch when written: PORTA pins when read
Bit 5
(1)
(1)
—
CHS1
INTE
Bit 4
(1)
(1)
—
PCFG3
SSPIF
SSPIE
CHS0
RBIE
Bit 3
Turning off the A/D places the A/D module in its lowest
current consumption state.
10.6
A device RESET forces all registers to their RESET
state. This forces the A/D module to be turned off, and
any conversion is aborted. All A/D input pins are con-
figured as analog inputs.
The value that is in the ADRESH:ADRESL registers is
not
ADRESH:ADRESL registers will contain unknown data
after a Power-on Reset.
Note:
GO/DONE
TMR0IF
CCP1IE
CCP1IF
PCFG2
modified
Bit 2
Effects of a RESET
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS1:ADCS0 = 11). To allow the con-
version to occur during SLEEP, ensure the
SLEEP instruction immediately follows the
instruction that sets the GO/DONE bit.
TMR2IF TMR1IF r0rr 0000 0000 0000
TMR2IE TMR1IE r0rr 0000 0000 0000
PCFG1
Bit 1
INTF
—
for
a
PCFG0 --0- 0000 --0- 0000
ADON
RBIF
Bit 0
PIC16F872
Power-on
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 00-0 0000 00-0
--11 1111 --11 1111
--0x 0000 --0u 0000
POR,
BOR
DS30221C-page 85
Reset.
MCLR,
WDT
The