PIC16F872-I/SP Microchip Technology Inc., PIC16F872-I/SP Datasheet - Page 13

• Manufacturer Part Number: PIC16F872-I/SP
• Description: 28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F872-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 64 Bytes
• Input Output: 22
• Interface: I2C/SPI
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 2-1:
© 2006 Microchip Technology Inc.
Address
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0', r = reserved.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents are
Bank 2
Bank 3
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1,2)
(2)
(1,2)
(2)
2: These registers can be addressed from any bank.
3: These bits are reserved; always maintain these bits clear.
EEDATA
EECON1
EECON2
INDF
TMR0
PCL
STATUS
FSR
PORTB
PCLATH
INTCON
EEADR
EEDATH
EEADRH
INDF
OPTION_REG
PCL
STATUS
FSR
TRISB
PCLATH
INTCON
Shaded locations are unimplemented, read as ‘0’.
transferred to the upper byte of the program counter.
Name
—
—
—
—
—
—
—
—
—
—
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR to address data memory
(not a physical register)
Timer0 Module Register
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
PORTB Data Latch when written: PORTB pins when read
Unimplemented
Unimplemented
Unimplemented
EEPROM Data Register Low Byte
EEPROM Address Register Low Byte
Addressing this location uses contents of FSR to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
PORTB Data Direction Register
Unimplemented
Unimplemented
Unimplemented
EEPROM Control Register2 (not a physical register)
Reserved; maintain clear
Reserved; maintain clear
EEPGD
RBPU
Bit 7
IRP
GIE
IRP
GIE
—
—
—
—
INTEDG
PEIE
PEIE
Bit 6
RP1
RP1
—
—
—
—
—
EEPROM Data Register High Byte
TMR0IE
TMR0IE
T0CS
Bit 5
RP0
RP0
—
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
EEPROM Address Register High Byte
Write Buffer for the upper 5 bits of the Program Counter ---0 0000 20, 93
T0SE
INTE
INTE
Bit 4
TO
TO
—
WRERR
RBIE
RBIE
Bit 3
PSA
PD
PD
TMR0IF
TMR0IF
WREN
Bit 2
PS2
Z
Z
INTF
INTF
Bit 1
PS1
WR
DC
DC
PIC16F872
RBIF
RBIF
Bit 0
PS0
RD
C
C
DS30221C-page 11
0000 0000 21, 93
xxxx xxxx 35, 93
0000 0000 20, 93
0001 1xxx 12, 93
xxxx xxxx 21, 93
xxxx xxxx 31, 93
---0 0000 20, 93
0000 000x 14, 93
xxxx xxxx 23, 94
xxxx xxxx 23, 94
xxxx xxxx 23, 94
xxxx xxxx 23, 94
0000 0000 21, 93
1111 1111 13, 94
0000 0000 20, 93
0001 1xxx 12, 93
xxxx xxxx 21, 93
1111 1111 31, 94
0000 000x 14, 93
x--- x000 24, 94
---- ---- 23, 94
0000 0000
0000 0000
Value on:
POR,
BOR
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Details
page:
on
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