PIC16F872-I/SP Microchip Technology Inc., PIC16F872-I/SP Datasheet - Page 47

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PIC16F872-I/SP

Manufacturer Part Number
PIC16F872-I/SP
Description
28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F872-I/SP

A/d Inputs
5-Channel, 10-Bit
Cpu Speed
5 MIPS
Eeprom Memory
64 Bytes
Input Output
22
Interface
I2C/SPI
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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8.0
The Capture/Compare/PWM (CCP) module contains a
16-bit register, which can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
The timer resources used by the module are shown in
Table 8-1.
Capture/Compare/PWM Register 1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match and will reset Timer1.
REGISTER 8-1:
© 2006 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
MODULE
bit 7-6
bit 5-4
bit 3-0
CCP1CON REGISTER (ADDRESS: 17h)
bit 7
Unimplemented: Read as '0'
CCP1X:CCP1Y: PWM Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
CCP1M3:CCP1M0: CCP1 Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCP module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is
1011 = Compare mode, trigger special event (CCP1IF bit is set, CCP1 pin is unaffected);
11xx = PWM mode
Legend:
R = Readable bit
- n = Value at POR
U-0
unaffected)
CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled)
U-0
CCP1X
R/W-0
W = Writable bit
’1’ = Bit is set
CCP1Y
R/W-0
Additional information on CCP modules is available in
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023) and in Application Note (AN594),
“Using the CCP Modules” (DS00594).
TABLE 8-1:
CCP Mode
CCP1M3
Compare
Capture
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
PWM
CCP MODE - TIMER
RESOURCES REQUIRED
CCP1M2
R/W-0
PIC16F872
CCP1M1
x = Bit is unknown
Timer Resource
R/W-0
DS30221C-page 45
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0

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