ADAU1381BCPZ Analog Devices Inc, ADAU1381BCPZ Datasheet - Page 50

• Manufacturer Part Number: ADAU1381BCPZ
• Description: IC AUDIO CODEC STEREO LN 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Stereo Audior

Specifications of ADAU1381BCPZ

• Data Interface: Serial, SPI™
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 100
• Dynamic Range, Adcs / Dacs (db) Typ: 96.5 / 100
• Voltage - Supply, Analog: 1.8 V ~ 3.65 V
• Voltage - Supply, Digital: 1.63 V ~ 3.65 V
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN, CSP Exposed Pad
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 3
• No. Of Output Channels: 3
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 100dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAU1381
Register 16398 (0x400E), Record Gain Left PGA
The record gain left PGA control register controls the left channel
input PGA. This register configures the input for either differ-
ential or single-ended signals and sets the left channel input
recording volume.
Bits[7:5], Left Input Gain
These bits set the left channel analog microphone input PGA gain.
Bit 2, Single-Ended Left Input Enable
If this bit is high (enabled), a single-ended input can be input on
the LMIC pin and gained by the PGA. The positive differential
Table 37. Record Gain Left PGA Register
Bits
[7:5]
[4:3]
2
1
0
Description
Left input gain
000: 0 dB
001: 6 dB
010: 10 dB
011: 14 dB
100: 17 dB
101: 20 dB
110: 26 dB
111: 32 dB
Reserved
Single-ended left input enable
0: disabled
1: enabled
Record path left mute
0: muted
1: unmuted
Left PGA enable
0: disabled
1: enabled
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input pin (LMICP) is disabled, and the complementary input of
the PGA is switched to common mode.
Bit 1, Record Path Left Mute
This bit mutes the left channel input PGA.
Bit 0, Left PGA Enable
This bit enables the left channel input PGA
Default
000
0
0
0