ADAU1381BCPZ Analog Devices Inc, ADAU1381BCPZ Datasheet - Page 4

• Manufacturer Part Number: ADAU1381BCPZ
• Description: IC AUDIO CODEC STEREO LN 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Stereo Audior

Specifications of ADAU1381BCPZ

• Data Interface: Serial, SPI™
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 100
• Dynamic Range, Adcs / Dacs (db) Typ: 96.5 / 100
• Voltage - Supply, Analog: 1.8 V ~ 3.65 V
• Voltage - Supply, Digital: 1.63 V ~ 3.65 V
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN, CSP Exposed Pad
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 3
• No. Of Output Channels: 3
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 100dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAU1381
SPECIFICATIONS
Performance of all channels is identical, exclusive of the interchannel gain mismatch and interchannel phase deviation specifications.
Supply voltages AVDD = AVDD1 = AVDD2 = I/O supply = 3.3 V, digital supply = 1.5 V, unless otherwise noted; temperature = 25°C;
master clock (MCLK) = 12.288 MHz (f
word width = 24 bits; load capacitance (digital output) = 20 pF; load current (digital output) = 2 mA; high level input voltage = 0.7 × IOVDD;
and low level input voltage = 0.3 × IOVDD. All power management registers are set to their default states.
RECORD SIDE PERFORMANCE SPECIFICATIONS
Specifications guaranteed at 25°C (ambient).
Table 1.
Parameter
ANALOG-TO-DIGITAL CONVERTERS
INPUT RESISTANCE
SINGLE-ENDED MICROPHONE INPUT
TO ADC PATH
ADC Resolution
Digital Attenuation Step
Digital Attenuation Range
Noninverting Inputs PGA
Inverting Inputs PGA (LMICN, RMICN)
Beep Input PGA
Full-Scale Input Voltage (0 dB)
Dynamic Range
Total Harmonic Distortion + Noise
Signal-to-Noise Ratio
(LMICP, RMICP)
With A-Weighted Filter (RMS)
No Filter (RMS)
With A-Weighted Filter (RMS)
No Filter (RMS)
S
= 48 kHz, 256 × f
Test Conditions/Comments
All ADCs
All gain settings
0 dB gain
6 dB gain
10 dB gain
14 dB gain
17 dB gain
20 dB gain
26 dB gain
32 dB gain
0 dB
6 dB
10 dB
14 dB
−23 dB
20 dB
26 dB
32 dB
Scales linearly with AVDD
AVDD = 1.8 V
AVDD = 3.3 V
−60 dB input
AVDD = 1.8 V
AVDD = 3.3 V
AVDD = 1.8 V
AVDD = 3.3 V
−3 dBFS
AVDD = 1.8 V
AVDD = 3.3 V
AVDD = 1.8 V
AVDD = 3.3 V
AVDD = 1.8 V
AVDD = 3.3 V
S
mode); input sample rate = 48 kHz; measurement bandwidth = 20 Hz to 20 kHz;
Rev. B | Page 4 of 84
Min
94
92
Typ
24
0.375
95
500
62
32
22
14
10
8
5
4
20
9
6
3.5
50
2
2
2
AVDD/3.3
0.55 (1.56)
1.0 (2.83)
96
99.2
92
96.5
−88
−90
96
100
92
97
Max
Unit
Bits
dB
dB
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
V rms
V rms (V p-p)
V rms (V p-p)
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB