EZ80190AZ050SG Zilog, EZ80190AZ050SG Datasheet - Page 44

• Manufacturer Part Number: EZ80190AZ050SG
• Description: IC WEBSERVER 8 BIT 50MHZ 100LQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050SG

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: EZ80190x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3866; EZ80190AZ050SG

Programmable Reload Timer Registers
PS006614-1208
Reading the Current Count Value
Timer Interrupts
Table 4. PRT Continuous Mode Operation Example
The eZ80
This READ event does not affect timer operation.
The timer interrupt flag, PRT_IRQ, is set to 1 whenever the timer reaches its end-of-count
value,
TINUOUS mode. The timer interrupt flag is only set when the timer reaches
reloads) from
the value
The CPU can be programmed to poll the PRT_IRQ bit for the time-out event. Alterna-
tively, an interrupt service request signal can be sent to the CPU by setting the IRQ_EN bit
to 1. Then, when the end-of-count value,
1, an interrupt service request signal is passed to the CPU. The PRT_IRQ bit is cleared to
0 and the interrupt service request signal is inactivated whenever the CPU reads from the
timer control register, TMRx_CTL.
The response of the CPU to this interrupt service request is a function of the CPU’s inter-
rupt enable flag, IEF1. For more information, refer to eZ80
(UM0077).
Each programmable reload timer is controlled using five 8-bit registers. These registers
are the TIMERx Control register, TIMERx Reload Low Byte register, TIMERx Reload
High Byte register, TIMERx Data Low Byte register, and TIMERx Data High Byte regis-
ter. The variable x can be 0, 1, 2, 3, 4, or 5, representing each of the six available timers.
Parameter
PRT Enabled
Reload and Restart Enabled
PRT Clock Divider = 2
Continuous Mode
PRT Interrupt Enabled
PRT Reload Value
0000h
®
0000h
CPU is capable of reading the current count value while the timer is running.
, in SINGLE PASS mode, or when the timer reloads the start value in CON-
0001h
, which selects the maximum time-out period.
. The timer interrupt flag is not set to 1 when the timer is loaded with
Control Register(s)
TMRx_CTL[0]
TMRx_CTL[1]
TMRx_CTL[3:2]
TMRx_CTL[4]
TMRx_CTL[6]
{TMRx_RR_H, TMRx_RR_L}
0000h
, is reached and the PRT_IRQ bit is set to
®
CPU User Manual
Programmable Reload Timers
Product Specification
0000h
Value
1
1
00b
1
0
0004h
eZ80190
(or
34