EW80314GN S L8AZ Intel, EW80314GN S L8AZ Datasheet - Page 17

• Manufacturer Part Number: EW80314GN S L8AZ
• Manufacturer: Intel

Specifications of EW80314GN S L8AZ

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

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Intel
®
80314 I/O Processor Companion Chip Specification Update
Frame abort feature does not work
The MAC has a feature that allows an “excessively deferred frame” to be aborted when it is backed
up in the TX outgoing FIFO due to heavy Ethernet traffic. This feature does not work correctly.
When enabled, the firmware sees status indicating that the frame is aborted, when in fact it still sits
in the FIFO. The FIFO status is reported correctly, so no over-run occurs.
Do not enable this feature at offset 0x00c or 0x40c, or use only full-duplex mode. Note that this
feature is disabled by default.
No Fix
CLK_EN signal may glitch high
The SSTL2 I/O can glitch and change state when the 2.5 V supply is held up as the 1.2 V core
supply collapses.
This problem can cause the CLK_EN signal, which must be held low when entering power-down
mode, to glitch high.
The 2.5 V supply to the 80314 must be isolated by means of a FET switch during power-down to
ensure that the I/Os on the interface cannot switch.
No Fix
High DC current draw when core supply collapses
The SSTL2 I/O potentially drives to a high state when the 2.5 V supply is held up and the 1.2 V
core supply collapses.
This problem causes high DC current draw, since all signals are terminated to 1.25 V through a
65
The 2.5 V supply to the 80314 must be isolated by means of a FET switch during power-down to
ensure that the I/Os on the interface cannot switch.
No Fix
LS_VECTOR field of the VECTORx registers may report incorrect value 0
In the event that a level-sensitive interrupt is de-asserted prior to processing, the LS_VECTOR
field of the VECTORx registers may intermittently report 0 instead of the correct vector value.
The source vector for a spurious vector might be reported at 0x0.
When configured to use level-sensitive interrupts, initialize all source vector registers to non-zero
values. These values are application-dependent and must be chosen so as not to adversely impact
the system. Upon receiving notification of a spurious vector, first check to see that the source is
non-zero to ensure that it is a real spurious vector.
Fixed
A VECTORx read of 0xFF does not always mean that no interrupts are
pending
A VECTORx read of 0xFF does not always mean that no interrupts are pending.
Software mechanisms that poll the VECTOR register in their ISR in order to process multiple INTs
with minimal context switches cannot use the value of 0xFF to identify when no INTs are pending.
When a spurious vector is reported, software must read the register indicated by the LS_VECTOR
field in the VECTORx register to determine whether the INT is truly spurious
Fixed
resistor. Current is 20 mA per I/O, or 2.5 A for the entire interface.
Errata
17