EW80314GN S L8AZ Intel, EW80314GN S L8AZ Datasheet - Page 13

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EW80314GN S L8AZ

Manufacturer Part Number
EW80314GN S L8AZ
Description
Manufacturer
Intel
Datasheet

Specifications of EW80314GN S L8AZ

Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Documentation Changes
Intel
®
80314 I/O Processor Companion Chip Specification Update
No.
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PCI-X Bridge Status Register (Embedded Mode) (PE_PCI/X _S) has
incorrect values for default bus and function numbers
PFAB_CSR Register is described incorrectly
Removed and moved to Errata #39
Various attribute bits are not correct
I2C_RD_DATA Register defines incorrect byte order
GPIO offset is not correct
Various ball map diagram signals are not correct
SDRAM feedback clock length
PCI Interrupt Assertion register IRP_PIA added
PFAB_MEM32[11:0] field description should be reserved
Incorrect GPIO mappings for UART signals
I2C capability wording
PCI/X initialization sequence
Signal Listing Corrections
SDRAM PLL bypass
PWRDELAY circuitry not required for non-battery-backup designs
Design guideline table missing data
GPIO attribute reversal
Single Data Rate SDRAM is not supported
EE_Bx_ADDR Register Bit [31:8] description is not correct
Section 2.3.1.3 and 2.3.1.4 not correct
Table 12 not correct
Documentation Changes
Summary Table of Changes
13

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