PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 57

All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See

more information.

x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See

more information.

31:16

15:0

31:16

15:0

COMPARATOR REGISTER MAP

COMPARATOR VOLTAGE REFERENCE REGISTER MAP

31/15

—

30/14

COE

—

29/13

CPOL

SIDL

—

28/12

—

(1)

27/11

—

26/10

—

25/9

—

25/9

—

COUT

24/8

—

24/8

(1)

—

Bits

23/7

—

EVPOL<1:0>

—

EVPOL<1:0>

—

EVPOL<1:0>

—

23/7

—

22/6

CVROE

—

22/6

—

21/5

CVRR

—

21/5

—

CREF

20/4

CVRSS

—

20/4

—

19/3

Section 11.2 “CLR, SET and INV Registers”

—

19/3

—

C3OUT

18/2

—

18/2

—

CVR<3:0>

C2OUT

17/1

—

17/1

CCH<1:0>

—

C1OUT

16/0

—

0000

00C3

0000

00C3

0000

00C3

0000

for

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