PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 113

• Manufacturer Part Number: PIC32MX210F016B-I/SO
• Description: PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology

REGISTER 9-9:
© 2011-2012 Microchip Technology Inc.
Legend:
R = Readable bit
-n = Value at POR
bit 31-24 Unimplemented: Read as ‘0’
bit 23
bit 22
bit 21
bit 20
bit 19
bit 18
bit 17
bit 16
bit 15-8
bit 7
bit 6
bit 5
Range
31:24
23:16
15:8
Bit
7:0
CHSDIE: Channel Source Done Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHSHIE: Channel Source Half Empty Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHDDIE: Channel Destination Done Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHDHIE: Channel Destination Half Full Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHBCIE: Channel Block Transfer Complete Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHCCIE: Channel Cell Transfer Complete Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHTAIE: Channel Transfer Abort Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHERIE: Channel Address Error Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
Unimplemented: Read as ‘0’
CHSDIF: Channel Source Done Interrupt Flag bit
1 = Channel Source Pointer has reached end of source (CHSPTR = CHSSIZ)
0 = No interrupt is pending
CHSHIF: Channel Source Half Empty Interrupt Flag bit
1 = Channel Source Pointer has reached midpoint of source (CHSPTR = CHSSIZ/2)
0 = No interrupt is pending
CHDDIF: Channel Destination Done Interrupt Flag bit
1 = Channel Destination Pointer has reached end of destination (CHDPTR = CHDSIZ)
0 = No interrupt is pending
31/23/15/7
CHSDIE
CHSDIF
R/W-0
R/W-0
Bit
U-0
U-0
—
—
DCHxINT: DMA CHANNEL x INTERRUPT CONTROL REGISTER
30/22/14/6
CHSHIE
CHSHIF
R/W-0
R/W-0
Bit
U-0
U-0
—
—
W = Writable bit
‘1’ = Bit is set
29/21/13/5
CHDDIE
CHDDIF
R/W-0
R/W-0
Bit
U-0
U-0
—
—
Preliminary
28/20/12/4
CHDHIE
CHDHIF
R/W-0
R/W-0
Bit
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
27/19/11/3
CHBCIE
CHBCIF
R/W-0
R/W-0
Bit
U-0
U-0
—
—
PIC32MX1XX/2XX
26/18/10/2
CHCCIE
CHCCIF
R/W-0
R/W-0
Bit
U-0
U-0
—
—
x = Bit is unknown
25/17/9/1
CHTAIE
CHTAIF
R/W-0
R/W-0
Bit
U-0
U-0
—
—
DS61168D-page 113
24/16/8/0
CHERIE
CHERIF
R/W-0
R/W-0
Bit
U-0
U-0
—
—