CY7C924ADX-AC Cypress Semiconductor Corp, CY7C924ADX-AC Datasheet - Page 18

• Manufacturer Part Number: CY7C924ADX-AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C924ADX-AC

• Number Of Transceivers: 1
• Data Rate: 622Mbps
• Operating Supply Voltage (typ): 5V
• Supply Current (max): 250mA
• Screening Level: Commercial
• Pin Count: 100
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-02008 Rev. *E
the operation mode of the CY7C924ADX as selected by the
SPDSEL and RANGESEL inputs, and to a limited extent, by
the BYTE8/10*, ENCBYP* and FIFOBYP* signals.
shows the SPDSEL and RANGESEL for the case where the
FIFOs and encoding are enabled.
plier factors and clocking ranges for various combinations of
signals.
Table 4. Speed Select and Range Select Settings, FIFOs
and Encoding enabled
Transmit Control State Machine
The Transmit Control State Machine responds to multiple
inputs to control the data stream passed to the encoder. It
operates in response to:
• The state of the FIFOBYP* and LOOPTX inputs
• The state of the TXINT input
• The presence of data in the Transmit FIFO
SPDSEL
HIGH
HIGH
LOW
LOW
RANGESEL
HIGH
HIGH
LOW
LOW
Data Rate
(MBaud)
100–200
100–200
50–100
50–100
Serial
Table 5
provides the multi-
Frequency
REFCLK
(MHz)
10–20
20–40
10–20
20–40
Table 4
These signals are used by the Transmit Control State Machine
to control the data formatter, read access to the Transmit FIFO
and Elasticity Buffer, the Byte-Packer, and BIST. They
determine the content of the characters passed to the Encoder
and Transmit Shifter.
When the Transmit FIFO is bypassed, the Transmit Control
State Machine operates synchronous to REFCLK. In this
mode, data from the TXDATA bus (or other source) passes
directly from the Input Register to the Pipeline Register. If no
data is enabled into the Input register (TXEN* is deasserted)
then the Transmit Control State Machine presents a C5.0
Special Character code to the Encoder to maintain link
synchronization. If both the Encoder and Transmit FIFO are
bypassed and no data is enabled into the Input Register, the
Transmit Control State Machine injects an alternating disparity
sequence of preencoded (10 bit) forms of the C5.0 characters.
This also occurs if the encoder is bypassed, the Transmit FIFO
is enabled, and the Transmit FIFO is empty. However, since
disparity tracking is part of the Encoder, the transmitted C5.0
characters may generate a running disparity error at the
remote receiver. If the attached receiver has its decoder
enabled, these characters may be reported as a normal C5.0,
or as a C1.7 or C2.7 (K28.5 with incorrect running disparity).
• The contents of the Transmit FIFO
• The contents of the Elasticity Buffer
• The state of the transmitter BIST enable (TXBISTEN*)
• The state of external halt signals (TXHALT* and TXSTOP*)
CY7C924ADX
Page 18 of 58
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