82V2044BB IDT, Integrated Device Technology Inc, 82V2044BB Datasheet - Page 40

• Manufacturer Part Number: 82V2044BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2044BB

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

4.2
4.2.1
the device revision, which can be used to verify the proper version or
revision number that has been used in the system under test. The IDR is
32 bits long and is partitioned as in Table-20. Data from the IDR is
shifted out to TDO LSB first.
Table-21 Boundary Scan Register Description
Table-20 Device Identification Register Description
Table-19 Instruction Register Description
IDT82V2044
IEEE STD 1149.1 JTAG Test Access Port
The IDR can be set to define the producer number, part number and
Bit No.
IR Code
10
11
12
13
14
15
000
100
110
111
0
1
2
3
4
5
6
7
8
9
Bit No.
JTAG DATA REGISTER
DEVICE IDENTIFICATION REGISTER (IDR)
12~27
28~31
1~11
0
Bit Symbol
POUT0
POUT1
POUT2
POUT3
POUT4
POUT5
POUT6
POUT7
Sample/Preload
PIN0
PIN1
PIN2
PIN3
PIN4
PIN5
PIN6
PIN7
Instruction
Bypass
Idcode
Extest
Pin Signal
AD0
AD0
AD1
AD1
AD2
AD2
AD3
AD3
AD4
AD4
AD5
AD5
AD6
AD6
AD7
AD7
The external test instruction allows testing of the interconnection to other devices. When the current instruction is the
EXTEST instruction, the boundary scan register is placed between TDI and TDO. The signal on the input pins can be
sampled by loading the boundary scan register using the Capture-DR state. The sampled values can then be viewed by
shifting the boundary scan register using the Shift-DR state. The signal on the output pins can be controlled by loading
patterns shifted in through input TDI into the boundary scan register using the Update-DR state.
The sample instruction samples all the device inputs and outputs. For this instruction, the boundary scan register is placed
between TDI and TDO. The normal path between IDT82V2044 logic and the I/O pins is maintained. Primary device inputs
and outputs can be sampled by loading the boundary scan register using the Capture-DR state. The sampled values can
then be viewed by shifting the boundary scan register using the Shift-DR state.
The identification instruction is used to connect the identification register between TDI and TDO. The device's identifica-
tion code can then be shifted out using the Shift-DR state.
The bypass instruction shifts data from input TDI to output TDO with one TCK clock period delay. The instruction is used
to bypass the device.
Producer Number
Device Revision
Part Number
Comments
Set to ‘1’
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
40
4.2.2
the TDI input and TDO output, bypassing the BSR to reduce test access
times.
4.2.3
digital I/O pins. The BSR is a 98 bits long shift register and is initialized
and read using the instruction EXTEST or SAMPLE/PRELOAD. Each
pin is related to one or more bits in the BSR. Please refer to
details of BSR bits and their functions.
The BR consists of a single bit. It can provide a serial path between
The BSR can apply and read test patterns in parallel to or from all the
BYPASS REGISTER (BR)
BOUNDARY SCAN REGISTER (BSR)
Comments
QUAD T1/E1 SHORT HAUL LINE INTERFACE UNIT
Comments
September 22, 2005
Table-21
for