82V2044BB IDT, Integrated Device Technology Inc, 82V2044BB Datasheet - Page 24

• Manufacturer Part Number: 82V2044BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2044BB

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

tored data can be observed digitally at the output pins RCLK0, RD0/
RDP0 and RDN0. LOS detector is still in use in channel 0 for the moni-
tored signal.
2.15 SOFTWARE RESET
reset cycle. This operation set all the registers to their default value.
2.16 POWER ON RESET
default values. The power-on reset takes at least 10
when the power supply exceeds 2/3 VDDA.
IDT82V2044
Functional Description
Writing register RS will cause software reset by initiating about 1
During power up, an internal reset signal sets all the registers to
TRING0
TRINGn
RRINGn
RRING0
TTIPn
RTIPn
TTIP0
RTIP0
Monitor
G.772
Detector
Detector
Peak
Peak
Driver
Driver
Line
Line
Figure-20 Monitoring Principle
µ
s, starting from
Slicer
Slicer
CLK&Data
µ
CLK&Data
Recovery
Waveform
Waveform
Recovery
(DPLL)
Transmit
All Ones
Transmit
s
All Ones
Shaper
(DPLL)
Shaper
Detector
Detector
24
LOS
LOS
back. The signal which is being monitored will output on TTIP0 and
TRING0. The output signal can then be connected to a standard test
equipment with an E1 electrical interface for non-intrusive monitoring.
2.17 POWER DOWN
low for more than 64 MCLK cycles (if MCLK is available) or about 30
(if MCLK is not available). In host mode, each transmit channel will also
be powered down by setting bit TPDNn in register e-TPDN to ‘1’.
MCLK is clocked or high, setting bit RPDNn in register e-RPDN to ‘1’ will
configure the corresponding receiver to be powered down.
In monitoring mode, channel 0 can be configured in Remote Loop-
Each transmit channel will be powered down by pulling pin TCLKn
All the receivers will be powered down when MCLK is low. When
QUAD T1/E1 SHORT HAUL LINE INTERFACE UNIT
Attenuator
Attenuator
Attenuator
Attenuator
Jitter
Jitter
Jitter
Jitter
Channel N ( 3 > N > 1 )
Loopback
Channel 0
Remote
HDB3/AMI
HDB3/AMI
HDB3/AMI
HDB3/AMI
Decoder
Decoder
Encoder
Encoder
B8ZS/
B8ZS/
B8ZS/
B8ZS/
September 22, 2005
BPVIn/TDNn
BPVI0/TDN0
CVn/RDNn
TDn/TDPn
RD0/RDP0
RDn/RDPn
CV0/RDN0
TD0/TDP0
RCLKn
RCLK0
TCLK0
TCLKn
LOS0
LOSn
µ
s