SX1211I084TRT Semtech, SX1211I084TRT Datasheet - Page 42

• Manufacturer Part Number: SX1211I084TRT
• Description: IC SNGL-CHIP TXRX 32-TQFN
• Manufacturer: Semtech

Specifications of SX1211I084TRT

• Frequency: 860 ~ 960MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: AMR, ISM, Security and Access
• Power - Output: 12.5dBm
• Sensitivity: -113dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Modulation Type: FSK/OOK
• Package Type: TQFN EP
• Operating Supply Voltage (min): 2.1V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: SX1211I084TRT

If the bit synchronizer is disabled, the raw demodulator output is made directly available on DATA pin and no DCLK
signal is provided.
Conversely, if the bit synchronizer is enabled, synchronous cleaned data and clock are made available respectively
on DATA and IRQ_1 pins. DATA is sampled on the rising edge of DCLK and updated on the falling edge as
illustrated in Figure 36.
Note that in Continuous mode it is always recommended to enable the bit synchronizer to clean the DATA signal
even if the DCLK signal is not used by the uC. (bit synchronizer is automatically enabled in Buffered and Packet
mode).
The tables below give the description of the interrupts available in Continuous mode.
Table 17: Interrupt Mapping in Continuous Rx Mode
Note: In Continuous mode, no interrupt is available in Stby mode
Table 18: Interrupt Mapping in Continuous Tx Mode
Rev 7 – Sept 2
ADVANCED COMMUNICATIONS & SENSING
5.3.3. Rx Processing
5.3.4. Interrupt Signals Mapping
nd
, 2008
DATA (NRZ)
DCLK
IRQ_0
Figure 36: Rx Processing in Continuous Mode
IRQ_0
IRQ_1
IRQ_1
Rx_stby_irq_0
00 (d)
01
1x
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Tx
-
DCLK
Rx
Sync
RSSI
-
DCLK
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