SX1211I084TRT Semtech, SX1211I084TRT Datasheet - Page 22

IC SNGL-CHIP TXRX 32-TQFN

SX1211I084TRT

Manufacturer Part Number
SX1211I084TRT
Description
IC SNGL-CHIP TXRX 32-TQFN
Manufacturer
Semtech
Datasheets

Specifications of SX1211I084TRT

Frequency
860 ~ 960MHz
Data Rate - Maximum
200kbps
Modulation Or Protocol
FSK, OOK
Applications
AMR, ISM, Security and Access
Power - Output
12.5dBm
Sensitivity
-113dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
3mA
Current - Transmitting
25mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Modulation Type
FSK/OOK
Package Type
TQFN EP
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
SX1211I084TRT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SX1211I084TRT
Manufacturer:
HITTITE
Quantity:
560
Part Number:
SX1211I084TRT
0
The recommended PA bias and matching circuit is illustrated below:
Please refer to section 7.5.3 of this document for the optimized matching arrangement for each frequency band.
The receiver and the transmitter share the same RFIO pin (pin 31). Figure 13 below shows the configuration of the
common RF front-end.
Rev 7 – Sept 2
ADVANCED COMMUNICATIONS & SENSING
In transmit mode, the PA and the PA regulator are active, with the voltage on the VR_PA pin equal to the
nominal voltage of the regulator (1.8 V). The external inductance is used to bias the PA.
In receive mode, both PA and PA regulator are off and VR_PA is tied to ground. The external inductance LT1
is then used to bias the LNA.
3.3.8. Common Input and Output Front-End
nd
, 2008
3.3.7.3. Suggested PA Biasing and Matching
Figure 12: Recommended PA Biasing and Output Matching
PA
To
Antenna
VR_PA
RFIO
Figure 13: Front-end Description
VR_PA
RFIO
100nH
Low-pass and DC block
Page 22 of 92
47nF
Rx_on
Reg_PA
LNA
PA
SAW
DC block
Antenna
port
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