DSP56F803BU80 Freescale Semiconductor, DSP56F803BU80 Datasheet - Page 4

IC DSP 80MHZ 31.5K FLASH 100LQFP

DSP56F803BU80

Manufacturer Part Number
DSP56F803BU80
Description
IC DSP 80MHZ 31.5K FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxr
Datasheet

Specifications of DSP56F803BU80

Core Processor
56800
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Size
71KB (35.5K x 16)
Program Memory Type
FLASH
Ram Size
2.5K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part 1 Overview
1.1 56F803 Features
1.1.1
1.1.2
1.1.3
4
Efficient 16-bit 56800 family controller engine with dual Harvard architecture
As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency
Single-cycle 16 × 16
Two 36
16
Parallel instruction set with unique processor addressing modes
Hardware DO and REP loops
Three internal address buses and one external address bus
Four internal data buses and one external data bus
Instruction set supports both DSP and controller functions
Controller style addressing modes and instructions for compact code
Efficient C compiler and local variable support
Software subroutine and interrupt stack with depth limited only by memory
JTAG/OnCE debug programming interface
Harvard architecture permits as many as three simultaneous accesses to Program and Data memory
On-chip memory including a low-cost, high-volume Flash solution
— 31.5K × 16-bit words of Program Flash
— 512K × 16
— 4K × 16
— 2K × 16
— 2K × 16
Off-chip memory expansion capabilities programmable for 0, 4, 8, or 12 wait states
— As much as 64K × 16 bits of Data memory
— As much as 64K × 16 bits of Program memory
Pulse Width Modulator module (PWM) with six PWM outputs, three Current Sense inputs, and three Fault
inputs, fault-tolerant design with dead time insertion, supports both center- and edge- aligned modes,
supports Freescale’s patented dead time distortion correction
Two 12
PWM modules can be synchronized
Quadrature Decoder with four inputs (shares pins with Quad Timer)
-
bit bidirectional barrel shifter
Processing Core
Memory
Peripheral Circuits for 56F803
-
-
bit Analog-to-Digital Converters (ADCs), which support two simultaneous conversions; ADC and
bit accumulators, including extension bits
-
-
-
bit words of Data Flash
bit words of Data RAM
bit words of Boot Flash
-
bit words of Program RAM
-
bit parallel Multiplier-Accumulator (MAC)
56F803 Technical Data, Rev. 16
Freescale Semiconductor

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