C8051F351-GMR Silicon Laboratories Inc, C8051F351-GMR Datasheet - Page 21

IC 8051 MCU 8K FLASH 28MLP

C8051F351-GMR

Manufacturer Part Number
C8051F351-GMR
Description
IC 8051 MCU 8K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Datasheets

Specifications of C8051F351-GMR

Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x24b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F350DK
Minimum Operating Temperature
- 40 C
On-chip Adc
24 bit, 8 Channel
On-chip Dac
8 bit, 2 Channel
For Use With
336-1083 - DEV KIT FOR F350/351/352/353
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
1.1.
1.1.1. Fully 8051 Compatible Instruction Set
The C8051F35x devices use Silicon Labs’ proprietary CIP-51 microcontroller core. The CIP-51 is fully
compatible with the MCS-51™ instruction set. Standard 803x/805x assemblers and compilers can be used
to develop software. The C8051F35x family has a superset of all the peripherals included with a standard
8052.
1.1.2. Improved Throughput
The CIP-51 employs a pipelined architecture that greatly increases its instruction throughput over the stan-
dard 8051 architecture. In a standard 8051, all instructions except for MUL and DIV take 12 or 24 system
clock cycles to execute, and usually have a maximum system clock of 12 to 24 MHz. By contrast, the CIP-
51 core executes 70% of its instructions in one or two system clock cycles, with no instructions taking more
than eight system clock cycles.
With the CIP-51's system clock running at 50 MHz, it has a peak throughput of 50 MIPS. The CIP-51 has a
total of 109 instructions. The table below shows the total number of instructions that require each execution
time.
1.1.3. Additional Features
The C8051F350/1/2/3 SoC family includes several key enhancements to the CIP-51 core and peripherals
to improve performance and ease of use in end applications.
An extended interrupt handler allows the numerous analog and digital peripherals to operate indepen-
dently of the controller core and interrupt the controller only when necessary. By requiring less intervention
from the microcontroller core, an interrupt-driven system is more efficient and allows for easier implemen-
tation of multi-tasking, real-time systems.
Eight reset sources are available: power-on reset circuitry (POR), an on-chip V
Timer, a Missing Clock Detector, a voltage level detection from Comparator0, a forced software reset, an
external reset pin, and an illegal Flash access protection circuit. Each reset source except for the POR,
Reset Input Pin, or Flash error may be disabled by the user in software. The WDT may be permanently
enabled in software after a power-on reset during MCU initialization.
The internal oscillator is factory calibrated to 24.5 MHz ±2%. An external oscillator drive circuit is also
included, allowing an external crystal, ceramic resonator, capacitor, RC, or CMOS clock source to generate
the system clock. A clock multiplier allows for operation at up to 50 MHz. An external oscillator can also be
extremely useful in low power applications, allowing the MCU to run from a slow (power saving) source,
while periodically switching to the fast internal oscillator as needed.
Number of Instructions
Clocks to Execute
CIP-51™ Microcontroller
26
1
50
2
2/3
Rev. 1.1
5
14
3
3/4
7
C8051F350/1/2/3
4
3
DD
4/5
1
monitor, a Watchdog
5
2
8
1
21

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