ST72F623F2M1 STMicroelectronics, ST72F623F2M1 Datasheet - Page 110

IC MCU 8BIT LS 8K 20-SOIC

ST72F623F2M1

Manufacturer Part Number
ST72F623F2M1
Description
IC MCU 8BIT LS 8K 20-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F623F2M1

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI, USB
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
11
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-2114-5

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12.8 I/O PORT PIN CHARACTERISTICS
12.8.1 General Characteristics
Subject to general operating conditions for V
Figure 61. Two typical Applications with unused I/O Pin
Figure 62. Typical I
Notes:
1. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see
based on design simulation and technology characteristics, not tested in production. This value depends on V
perature values.
2. The R
scribed in
3. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
110/139
Symbol
t
t
t
r(IO)out
f(IO)out
w(IT)in
V
R
C
V
V
V
I
I
hys
PU
S
IH
IN
L
IO
IL
-10.0
-20.0
-30.0
-40.0
-50.0
-60.0
-70.0
-80.0
-90.0
0.0
PU
Figure
3.0
pull-up equivalent resistor is based on a resistive transistor (corresponding I
Input low level voltage
Input high level voltage
Input voltage
Schmitt trigger voltage hysteresis
Input leakage current
Static current consumption
Weak pull-up equivalent resistor
I/O pin capacitance
Output high to low level fall time
Output low to high level rise time
External interrupt pulse time
3.5
62). This data is based on characterization results.
V
DD
4.0
PU
Parameter
10kΩ
Vdd (V)
vs. V
4.5
DD
UNUSED I/O PORT
5.0
with V
1)
3)
ST72XXX
5.5
IN
2)
=V
6.0
True Open Drain I/O pins
Other I/O pins
V
Floating input mode
V
C
Between 10% and 90%
SS
DD
SS
IN
L
=50pF
=
, f
V
V
SS
CPU
IN
Conditions
Doc ID 6996 Rev 5
Figure
V
, and T
DD
Figure 63. Typical R
V
61). Static peak current value taken at a fixed V
DD
=5V
180
160
140
120
100
A
80
60
40
20
0
unless otherwise specified.
3.0
10kΩ
3.5
0.7xV
Min
V
50
1
SS
UNUSED I/O PORT
DD
4.0
PU
ST72XXX
Vdd (V)
PU
vs. V
Typ
400
400
80
25
25
4.5
5
current characteristics de-
DD
5.0
0.3xV
with V
Max
V
150
6.0
±1
DD
5.5
DD
DD
IN
=V
and tem-
IN
6.0
t
Unit
mV
CPU
SS
μA
pF
ns
value,
V
V

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