M30873FHBGP#U3 Renesas Electronics America, M30873FHBGP#U3 Datasheet - Page 573

• Manufacturer Part Number: M30873FHBGP#U3
• Description: IC M32C/87 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30873FHBGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 549 of 587
Timing Requirements
(VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified)
Table 27.51
NOTE:
tac1(RD-DB)
tac1(AD-DB)
tac2(RD-DB)
tac2(AD-DB)
tsu(DB-BCLK)
tsu(RDY-BCLK)
tsu(HOLD-BCLK)
th(RD-DB)
th(BCLK-RDY)
th(BCLK-HOLD)
td(BCLK-HLDA)
1. Values, which depend on BCLK frequency and external bus cycles, can be obtained from the following
Symbol
equations. Insert wait states or lower the operation frequency, f(BCLK), if the calculated value is negative.
tac1(RD-DB) =
tac1(AD-DB) =
tac2(RD-DB) =
tac2(AD-DB) =
Memory Expansion Mode and Microprocessor Mode
Data input access time (RD standard)
Data input access time (AD standard, CS standard)
Data input access time (RD standard, when accessing a space with the
multiplexed bus)
Data input access time (AD standard, when accessing a space with the
multiplexed bus)
Data input setup time
RDY input setup time
HOLD input setup time
Data input hold time
RDY input hold time
HOLD input hold time
HLDA output delay time
f(BCLK) × 2
f(BCLK) × 2
f(BCLK) × 2
10
10
10
10
f(BCLK)
9
9
9
9
× m
× n
× m
× p
- 35 [ns] (if external bus cycle is a φ + b φ , m = (b × 2) + 1)
- 35 [ns] (if external bus cycle is a φ + b φ , n = a + b)
- 35 [ns] (if external bus cycle is a φ + b φ , m = (b × 2) - 1)
- 35 [ns] (if external bus cycle is a φ + b φ , p = {(a + b - 1) × 2} + 1)
Parameter
VCC1 = VCC2 = 3.3 V
27. Electrical Characteristics
Min.
30
40
60
0
0
0
Standard
(note 1)
(note 1)
(note 1)
(note 1)
Max.
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns