PIC16F785-I/SO Microchip Technology, PIC16F785-I/SO Datasheet - Page 68

• Manufacturer Part Number: PIC16F785-I/SO
• Description: IC PIC MCU FLASH 2KX14 20SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F785/HV785
9.1.2
The CM2CON0 register is a functional copy of the
CM1CON0 register described in Section 9.1.1 “Com-
parator C1 Control Register”. A second control regis-
ter, CM2CON1, is also present for control of an
additional synchronizing feature, as well as mirrors of
both comparator outputs.
9.1.2.1
The CM2CON0 register, shown in Register 9-2,
contains the control and Status bits for Comparator C2.
Setting C2ON of the CM2CON0 Register enables
Comparator C2 for operation.
Bits C2CH<1:0> of the CM2CON0 Register select the
comparator input from the four analog pins, AN<7:5,1>.
C2R of the CM2CON0 Register selects the reference
to be used with the comparator. Setting C2R of the
CM2CON0 Register selects the C2V
comparator voltage reference module as the reference
voltage for the comparator. Clearing C2R selects the
C2IN+ input on the RC0/AN4/C2IN+ pin.
The output of the comparator is available internally via
the C2OUT bit of the CM2CON0 Register. To make the
output available for an external connection, the C2OE
bit of the CM2CON0 Register must be set.
FIGURE 9-2:
DS41249E-page 66
RA1/AN1/C12IN0-/V
Note:
Note
1:
2:
3:
RC2/AN6/C12IN2-/OP2
RC3/AN7/C12IN3-/OP1
RC1/AN5/C12IN1-/PH1
COMPARATOR C2 CONTROL
REGISTERS
To use AN<7:5,1> as analog inputs, the
appropriate bits must be programmed to 1
in the ANSEL0 register.
Control Register CM2CON0
When C2ON = 0, the C2 comparator will produce a ‘0’ output to the XOR Gate.
Timer1 gate control (see Figure 6-1).
Output shown for reference only. For more detail, see Figure 4-13.
RC0/AN4/C2IN+
REF
COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM
/ICSPCLK
C2V
C2CH<1:0>
REF
C2R
REF
0
1
0
1
2
3
MUX
MUX
2
output of the
C2VN
C2VP
C2
C2ON
C2POL
C2SP
(1)
From TMR1
The comparator output, C2OUT, can be inverted by
setting the C2POL bit of the CM2CON0 Register.
Clearing C2POL results in a non-inverted output.
A complete table showing the output state versus input
conditions and the polarity bit is shown in Table 9-2.
TABLE 9-2:
C2SP of the CM2CON0 Register configures the speed
of the comparator. When C2SP is set, the comparator
operates at its normal speed. Clearing C2SP operates
the comparator in low-power mode.
Input Condition
Note 1: The internal output of the comparator is
Clock
C2VN > C2VP
C2VN < C2VP
C2VN > C2VP
C2VN < C2VP
Q3*RD_CM2CON0
2: The C2 interrupt will operate correctly
3: For C2 output on RC4/C2OUT/PH2:
Q1
latched at the end of each instruction
cycle. External outputs are not latched.
with C2OE set or cleared. An external
output is not required for the C2 interrupt.
(C2OE = 1) and (C2ON = 1) and
(TRISA<4> = 0).
D
NRESET
C2OUT
D
EN
Q
C2 OUTPUT STATE VERSUS
INPUT CONDITIONS
Q
C2SYNC
D
EN
C2POL
CL
C2POL
0
1
© 2008 Microchip Technology Inc.
MUX
Q
0
0
1
1
RD_CM2CON0
RC4/C2OUT/PH2
SYNCC2OUT
C20E
To PWM Logic
C2OUT
0
1
1
0
Data Bus
Set C2IF
(2)
To
(3)