PIC16F785-I/SO Microchip Technology, PIC16F785-I/SO Datasheet - Page 114

IC PIC MCU FLASH 2KX14 20SOIC

PIC16F785-I/SO

Manufacturer Part Number
PIC16F785-I/SO
Description
IC PIC MCU FLASH 2KX14 20SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F785-I/SO

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
20-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
17
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F785-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F785/HV785
15.2.6
On power-up, the time-out sequence is as follows: first,
PWRT time out is invoked after POR has expired, then
OST is activated after the PWRT time out has expired.
The total time out will vary based on oscillator configu-
ration and PWRTE bit status. For example, in EC mode
with PWRTE bit equal to ‘1’ (PWRT disabled), there will
be no time out at all. Figure 15-4, Figure 15-6 and
Figure 15-6 depict time-out sequences. The device can
execute code from the INTOSC, while OST is active by
enabling Two-Speed Start-up or Fail-Safe Monitor (see
Section 3.6.2 “Two-Speed Start-up Sequence” and
Section 3.7 “Fail-Safe Clock Monitor”).
Since the time outs occur from the POR pulse, if MCLR
is kept low long enough, the time outs will expire. Then
bringing MCLR high will begin execution immediately
(see Figure 15-6). This is useful for testing purposes or
to synchronize more than one PIC16F785/HV785
device operating in parallel.
Table 15-5 shows the Reset conditions for some
special registers, while Table 15-4 shows the Reset
conditions for all the registers.
TABLE 15-1:
TABLE 15-2:
TABLE 15-3:
DS41249E-page 112
Name
PCON
STATUS
Legend:
Note 1:
Legend: u = unchanged, x = unknown
Oscillator Configuration
POR
0
u
u
u
u
u
RC, EC, INTOSC
XT, HS, LP
u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition. Shaded cells are
not used by BOR.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
TIME-OUT SEQUENCE
BOR
Bit 7
x
0
u
u
u
u
IRP
TIME OUT IN VARIOUS SITUATIONS
STATUS/PCON BITS AND THEIR SIGNIFICANCE
SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT
Bit 6
RP1
TO
1
1
0
0
u
1
PWRTE = 0
1024•T
Bit 5
RP0
T
T
PWRT
PD
PWRT
1
1
u
0
u
0
OSC
SBOREN
+
Power-up
Bit 4
TO
Power-on Reset
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep
PWRTE = 1
1024•T
Bit 3
PD
OSC
15.2.7
The Power Control register (address 8Eh) has two Sta-
tus bits to indicate what type of Reset that last
occurred.
Bit 0 is BOR (Brown-out Reset). BOR is unknown on
Power-on Reset. It must then be set by the user and
checked on subsequent Resets to see if BOR = 0,
indicating that a Brown-out has occurred. The BOR
Status bit is a “don’t care” and is not necessarily
predictable if the brown-out circuit is disabled
(BOREN<1:0> = 00 in the Configuration Word).
Bit 1 is POR (Power-on Reset). It is ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent Reset, if POR is ‘0’, it will indicate that a
Power-on Reset has occurred (i.e., V
gone too low).
For more information, see Section 15.2.4 “Brown-Out
Reset (BOR)”.
Bit 2
Z
PWRTE = 0
1024•T
T
T
PWRT
PWRT
Bit 1
POR
Brown-out Reset
DC
POWER CONTROL (PCON)
REGISTER
Condition
OSC
+
Bit 0
BOR
C
PWRTE = 1
1024•T
© 2008 Microchip Technology Inc.
---1 --qq
0001 1xxx
POR, BOR
Value on
OSC
Wake-up from
DD
1024•T
other Resets
Value on all
---1 --qq
0001 1xxx
Sleep
may have
OSC

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