PIC18F2320-I/SO Microchip Technology, PIC18F2320-I/SO Datasheet - Page 136

IC MCU FLASH 4KX16 EEPROM 28SOIC

PIC18F2320-I/SO

Manufacturer Part Number
PIC18F2320-I/SO
Description
IC MCU FLASH 4KX16 EEPROM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2320-I/SO

Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, I2C, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
 Details
PIC18F2220/2320/4220/4320
15.1
Capture/Compare/PWM Register 1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
TABLE 15-1:
TABLE 15-2:
DS39599G-page 134
CCPx Mode CCPy Mode
Compare
Capture
Capture
PWM
PWM
PWM
CCP Mode
Compare
Capture
CCP1 Module
PWM
Compare
Compare
Compare
Capture
Capture
CCP MODE - TIMER
RESOURCE
INTERACTION OF TWO CCP MODULES
PWM
TMR1 or TMR3 time base. Time base can be different for each CCP.
The compare could be configured for the Special Event Trigger which clears either TMR1
or TMR3 depending upon which time base is used.
The compare(s) could be configured for the Special Event Trigger which clears TMR1 or
TMR3 depending upon which time base is used.
The PWMs will have the same frequency and update rate (TMR2 interrupt).
None.
None.
Timer1 or Timer3
Timer1 or Timer3
Timer Resource
Timer2
15.2
Capture/Compare/PWM Register 2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. All are readable and writable.
CCP2 functions identically to CCP1 except for the
enhanced PWM modes offered by CCP2
Interaction
CCP2 Module
© 2007 Microchip Technology Inc.

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