PIC18F87J50-I/PT Microchip Technology, PIC18F87J50-I/PT Datasheet - Page 449

• Manufacturer Part Number: PIC18F87J50-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J50-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 5
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 28-15:
TABLE 28-20: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)
© 2009 Microchip Technology Inc.
70
70A
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1:
Param
No.
(CKP = 0)
(CKP = 1)
SDI
SDIx
SSx
SCKx
SCKx
SDOx
Note:
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
SC
SC
Symbol
DI
DI
B
DO
DO
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
2
V2
V2
L2
L2
L2WB SSx ↓ to Write to SSPxBUF
H2
H2
L2
H2
L2
H
L
H2
L2
R
F
B
R
F
Refer to Figure 28-3 for load conditions.
SC
SC
DO
SS
SC
SC
DI
DO
DO
SS
DI
L
H
L,
H,
L
H,
L
V
H,
V,
Z SSx ↑ to SDOx Output High-Impedance
SSx ↓ to SCKx ↓ or SCKx ↑ Input
SCKx Input High Time
(Slave mode)
SCKx Input Low Time
(Slave mode)
Setup Time of SDIx Data Input to SCKx Edge
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDIx Data Input to SCKx Edge
SDOx Data Output Rise Time
SDOx Data Output Fall Time
SCKx Output Rise Time (Master mode)
SCKx Output Fall Time (Master mode)
SDOx Data Output Valid after SCKx Edge
SSx ↑ after SCKx Edge
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
80
71
73
MSb In
MSb
Characteristic
74
72
75, 76
bit 6 - - - - - - 1
bit 6 - - - - 1
Continuous
Single byte
Continuous
Single byte
PIC18F87J50 FAMILY
78
79
1.25 T
1.25 T
1.5 T
79
78
LSb In
3 T
3 T
Min
100
100
LSb
40
40
CY
10
CY
—
—
—
—
—
CY
CY
83
CY
CY
+ 40
+ 40
+ 30
+ 30
77
Max Units Conditions
25
25
50
25
25
50
—
—
—
—
—
—
—
—
—
—
DS39775C-page 449
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)