PIC18F87J50-I/PT Microchip Technology, PIC18F87J50-I/PT Datasheet - Page 220

• Manufacturer Part Number: PIC18F87J50-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J50-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 5
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

programmable period register for Timer1 or Timer3. In
PIC18F87J50 FAMILY
TABLE 18-3:
18.2
Except for the operation of the Special Event Trigger
discussed below, the Capture and Compare modes of
the ECCP module are identical in operation to that of
CCP4. These are discussed in detail in Section 17.2
“Capture
Mode”.
18.2.1
ECCP1 and ECCP2 incorporate an internal hardware
trigger that is generated in Compare mode on a match
between the CCPRx register pair and the selected
timer. This can be used in turn to initiate an action. This
mode is selected by setting CCPxCON<3:0> to ‘1011’.
The Special Event Trigger output of either ECCP1 or
ECCP2 resets the TMR1 or TMR3 register pair, depend-
ing on which timer resource is currently selected. This
allows the CCPRx register pair to effectively be a 16-bit
addition, the ECCP2 Special Event Trigger will also start
an A/D conversion if the A/D module is enabled.
DS39775C-page 220
Compatible CCP
Dual PWM
Quad PWM
Compatible CCP
Dual PWM
Quad PWM
Compatible CCP
Compatible CCP
Dual PWM
Quad PWM
Legend: x = Don’t care, N/A = Not Available. Shaded cells indicate pin assignments not used by ECCP3 in a given mode.
Note 1:
ECCP Mode
PIC18F8XJ5X Devices, ECCPMX = 1, Extended Microcontroller mode, 16-Bit or 20-Bit Address Width:
Capture and Compare Modes
With ECCP3 in Quad PWM mode, CCP4’s output is overridden by P1D; otherwise, CCP4 is fully operational.
SPECIAL EVENT TRIGGER
Mode”
(1)
(1)
(1)
Microcontroller mode or Extended Microcontroller mode, 12-Bit Address Width:
PIN CONFIGURATIONS FOR ECCP3
Configuration
00xx 11xx
10xx 11xx
x1xx 11xx
00xx 11xx
10xx 11xx
x1xx 11xx
00xx 11xx
00xx 11xx
10xx 11xx
x1xx 11xx
CCP3CON
and
PIC18F8XJ5X Devices, ECCPMX = 0, Microcontroller mode:
Section 17.3
ECCP3
ECCP3
ECCP3
ECCP3
RG0
P3A
P3A
P3A
P3A
P3A
P3A
PIC18F8XJ5X Devices, ECCPMX = 1,
“Compare
Feature1 Devices:
RE6/AD14
RE6/AD14
RE6/AD14
RE6/AD14
RE4/AD12
RE4
RE4
P3B
P3B
P3B
P3B
Special Event Triggers are not implemented for
ECCP3, CCP4 or CCP5. Selecting the Special Event
Trigger mode for these modules has the same effect as
selecting the Compare with Software Interrupt mode
(CCPxM3:CCPxM0 = 1010).
18.3
When configured in Single Output mode, the ECCP
module functions identically to the standard CCP
module in PWM mode, as described in Section 17.4
“PWM Mode”. This is also sometimes referred to as
“Compatible
through 18-3.
RE5/AD13
RE5/AD13
RE5/AD13
RE5/AD13
RE3/AD11
RE3/AD11
Note:
Note:
RE3
RE3
RE3
P3C
P3C
Standard PWM Mode
The Special Event Trigger from ECCP2
will not set the Timer1 or Timer3 interrupt
flag bits.
When setting up single output PWM
operations, users are free to use either of
the processes described in Section 17.4.3
“Setup
Section 18.4.9 “Setup for PWM Opera-
tion”. The latter is more generic but will
work for either single or multi-output PWM.
RG3/CCP4
RG3/CCP4
RG3/CCP4
RG3/CCP4
RG3/CCP4
RG3/CCP4
RG3/CCP4
CCP”
RG3
P3D
P3D
P3D
for
mode
© 2009 Microchip Technology Inc.
RH7/AN15
RH7/AN15
RH5/AN13
RH5/AN13
RH5/AN13
PWM
RH5
P3B
P3B
N/A
N/A
N/A
as
Operation”
in
RH6/AN14
RH6/AN14
RH6/AN14
RH4/AN12
RH4/AN12
RH4/AN12
Tables 18-1
RH4
P3C
N/A
N/A
N/A
or