PIC18F87J50-I/PT Microchip Technology, PIC18F87J50-I/PT Datasheet - Page 165

• Manufacturer Part Number: PIC18F87J50-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J50-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 5
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 10-20: PORTJ FUNCTIONS
TABLE 10-21: SUMMARY OF REGISTERS ASSOCIATED WITH PORTJ
© 2009 Microchip Technology Inc.
RJ0/ALE
RJ1/OE
RJ2/WRL
RJ3/WRH
RJ4/BA0
RJ5/CE
RJ6/LB
RJ7/UB
Legend:
PORTJ
LATJ
TRISJ
PORTG
Legend: Shaded cells are not used by PORTJ.
Note 1:
Pin Name
Name
(1)
(1)
(1)
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Unimplemented on 64-pin devices, read as ‘0’.
TRISJ7
LATJ7
RDPU
Bit 7
Function
RJ7
WRH
WRL
RJ0
ALE
RJ1
RJ2
RJ3
RJ4
BA0
RJ5
RJ6
RJ7
OE
CE
UB
LB
TRISJ6
LATJ6
REPU
Bit 6
RJ6
Setting
TRIS
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
RJPU
TRISJ5
LATJ5
Bit 5
RJ5
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
(1)
Type
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
TRISJ4
LATJ4
Bit 4
RG4
RJ4
LATJ<0> data output.
PORTJ<0> data input.
External memory interface address latch enable control output; takes
priority over digital I/O.
LATJ<1> data output.
PORTJ<1> data input.
External memory interface output enable control output; takes priority
over digital I/O.
LATJ<2> data output.
PORTJ<2> data input.
External Memory Bus write low byte control; takes priority over
digital I/O.
LATJ<3> data output.
PORTJ<3> data input.
External memory interface write high byte control output; takes priority
over digital I/O.
LATJ<4> data output.
PORTJ<4> data input.
External memory interface byte address 0 control output; takes priority
over digital I/O.
LATJ<5> data output.
PORTJ<5> data input.
External memory interface chip enable control output; takes priority
over digital I/O.
LATJ<6> data output.
PORTJ<6> data input.
External memory interface lower byte enable control output; takes
priority over digital I/O.
LATJ<7> data output.
PORTJ<7> data input.
External memory interface upper byte enable control output; takes
priority over digital I/O.
TRISJ3
LATJ3
PIC18F87J50 FAMILY
Bit 3
RG3
RJ3
TRISJ2
LATJ2
Bit 2
RG2
RJ2
Description
TRISJ1
LATJ1
Bit 1
RG1
RJ1
TRISJ0
LATJ0
Bit 0
RG0
RJ0
DS39775C-page 165
on Page:
Values
Reset
65
64
65
64