PIC18F87J50-I/PT Microchip Technology, PIC18F87J50-I/PT Datasheet - Page 307

• Manufacturer Part Number: PIC18F87J50-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J50-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 5
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

21.2
The ADCON1 register allows the user to select an
acquisition time that occurs each time the GO/DONE
bit is set.
When the GO/DONE bit is set, sampling is stopped and
a conversion begins. The user is responsible for ensur-
ing the required acquisition time has passed between
selecting the desired input channel and setting the
GO/DONE bit. This occurs when the ACQT2:ACQT0
bits (ADCON1<5:3>) remain in their Reset state (‘000’)
and is compatible with devices that do not offer
programmable acquisition times.
If desired, the ACQT bits can be set to select a pro-
grammable acquisition time for the A/D module. When
the GO/DONE bit is set, the A/D module continues to
sample the input for the selected acquisition time, then
automatically begins a conversion. Since the acquisi-
tion time is programmed, there may be no need to wait
for an acquisition time between selecting a channel and
setting the GO/DONE bit.
In either case, when the conversion is completed, the
GO/DONE bit is cleared, the ADIF flag is set and the
A/D begins sampling the currently selected channel
again. If an acquisition time is programmed, there is
nothing to indicate if the acquisition time has ended or
if the conversion has begun.
21.3
The A/D conversion time per bit is defined as T
A/D conversion requires 11 T
The source of the A/D conversion clock is software
selectable.
There are seven possible options for T
• 2 T
• 4 T
• 8 T
• 16 T
• 32 T
• 64 T
• Internal RC Oscillator
For correct A/D conversions, the A/D conversion clock
(T
minimum T
more information).
Table 21-1 shows the resultant T
the device operating frequencies and the A/D clock
source selected.
© 2009 Microchip Technology Inc.
AD
) must be as short as possible but greater than the
OSC
OSC
OSC
OSC
OSC
OSC
Selecting and Configuring
Automatic Acquisition Time
Selecting the A/D Conversion
Clock
AD
(see parameter 130 in Table 28-29 for
AD
per 10-bit conversion.
AD
times derived from
AD
:
AD
. The
PIC18F87J50 FAMILY
TABLE 21-1:
21.4
The ANCON0, ANCON1, TRISA, TRISF and TRISH
registers control the operation of the A/D port pins. The
port pins needed as analog inputs must have their cor-
responding TRIS bits set (input). If the TRIS bit is
cleared (output), the digital output level (V
will be converted.
The A/D operation is independent of the state of the
CHS3:CHS0 bits and the TRIS bits.
Note 1:
Note 1: When reading the PORT register, all pins
Operation
16 T
32 T
64 T
2 T
4 T
8 T
AD Clock Source (T
RC
2:
OSC
OSC
OSC
Configuring Analog Port Pins
OSC
OSC
OSC
2: Analog levels on any pin defined as a
(2)
The RC source has a typical T
4 μs.
For device frequencies above 1 MHz, the
device must be in Sleep mode for the
entire conversion or the A/D accuracy may
be out of specification.
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an
analog input. Analog levels on a digitally
configured
converted.
digital input may cause the digital input
buffer to consume current out of the
device’s specification limits.
T
FREQUENCIES
ADCS2:ADCS0
AD
vs. DEVICE OPERATING
000
100
001
101
010
110
x11
input
AD
)
will
DS39775C-page 307
be
Frequency
22.86 MHz
45.71 MHz
11.43 MHz
Maximum
1.00 MHz
2.86 MHz
5.71 MHz
48.0 MHz
Device
AD
accurately
OH
time of
or V
(1)
OL
)