ATMEGA8L-8MU Atmel, ATMEGA8L-8MU Datasheet - Page 54

IC AVR MCU 8K 8MHZ 3V 32-QFN

ATMEGA8L-8MU

Manufacturer Part Number
ATMEGA8L-8MU
Description
IC AVR MCU 8K 8MHZ 3V 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8L-8MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Package
32MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8L-8MU
Manufacturer:
AT
Quantity:
20 000
54
ATmega8(L)
goes low. It is clocked into the PINxn Register at the succeeding positive clock edge. As indi-
cated by the two arrows t
between ½ and 1-½ system clock period depending upon the time of assertion.
When reading back a software assigned pin value, a nop instruction must be inserted as indi-
cated in
clock. In this case, the delay t
Figure 24. Synchronization when Reading a Software Assigned Pin Value
INSTRUCTIONS
SYSTEM CLK
SYNC LATCH
Figure
24. The out instruction sets the “SYNC LATCH” signal at the positive edge of the
PINxn
r16
r17
pd,max
pd
out PORTx, r16
through the synchronizer is 1 system clock period.
and t
pd,min
, a single signal transition on the pin will be delayed
0x00
nop
t
pd
0xFF
in r17, PINx
2486Z–AVR–02/11
0xFF

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