M5307C3 Freescale Semiconductor, M5307C3 Datasheet - Page 75

• Manufacturer Part Number: M5307C3
• Description: KIT EVALUATION FOR MCF5307
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: Microprocessorr

Specifications of M5307C3

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MCF5307
• Interface Type: Ethernet
• For Use With/related Products: MCF5307
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The M5307C3 uses -IRQ7 to support the ABORT function using the ABORT switch
S1 (black switch).
7, priority 3) if the user's program execution should be
a RESET (refer to Chapter 2 for more information on ABORT). Since the ABORT
switch is not capable of generating a vector in response to level seven
interrupt acknowledge
request for autovector mode.
The -IRQ1 line of the MCF5307 is not used on this
programmed for Level 1 with priority 1 and autovector. The user may use this
line for external interrupt request. Refer to MCF5307
information about the interrupt controller.
3.1.7.
The MCF5307
0x20000000
memory is relocatable to 32K byte boundary.
3.1.8.
The memory
MCF5307 Internal, External resources, and the ethernet controller. All the I/O
registers are memory mapped.
The MCF5307
which are used to enable external memory
are two -RAS lines for DRAM’s. There are registers to specify the address
range, type of access, and the method of -TA generation for each chip-select
and -RAS pins. These registers are programmed
memory and I/O devices.
The M5307C3
Section 3.3.) The M5307C3 uses -RAS1, -RAS2, -CAS0, -CAS1,
enable the SDRAM
populated), and -CS3 for Ethernet Bus I/O space.
The chip select mechanism
defined based on the memory
spaces).
Internal
The MCF5307 Registers and Memory Map
and is not used by the dBUG.
and I/O resources of the M5307C3
has built in logic and up to eight chip-select pins (-CS0 to -CS7)
uses chip-select zero (-CS0) to enable the Flash ROM’s
has 4K
DIMM
This switch
SRAM
Freescale Semiconductor, Inc.
of internal memory.
For More Information On This Product,
from
module (refer to Section 3.2), -CS2 for SRAM
of the MCF5307
is used to force a non-maskable interrupt (level
Go to: www.freescale.com
the processor, the debugger
space desired (User/Supervisor, Program/Data
51
allows the memory
and I/O devices. In addition there
It is available to the user. The
are divided into three groups,
This memory
board. However, the -IRQ1 is
by dBUG to map the external
aborted without issuing
User’s Manual for more
-CAS2, and -CAS3 to
programs
is mapped
mapping to be
(refer to
(not
this
to