M5307C3 Freescale Semiconductor, M5307C3 Datasheet - Page 121

• Manufacturer Part Number: M5307C3
• Description: KIT EVALUATION FOR MCF5307
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: Microprocessorr

Specifications of M5307C3

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MCF5307
• Interface Type: Ethernet
• For Use With/related Products: MCF5307
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MOTOROLA
1
2
3
1.2 Hardware Configuration
Unlike ADRAM memory, SDRAM does not use a symmetrical multiplexed addressing scheme, one in
which each address line on the DRAM device connects to two internal address lines—a row and column
address. ADRAM memories interfacing to the MCF5307 can use a simple wiring scheme in which a single
wire is added each time an ADRAM address bus grows by one bit, corresponding to one row address and
one column address.With SDRAM, however, the lower 8 (or 9 or 10 or 11) address lines typically do
connect internally to both row and column address lines, but higher address lines do not connect to column
address lines. This is illustrated in Table 1, where the 8 MByte module has 8 column address lines, but 11
row address lines.
The MCF5307 SDRAM controller was designed to interface to these asymmetrical SDRAMs seamlessly.
Standard SDRAM component can be directly connected to the MCF5307 by following the easy connection
chart found in the Asynchronous/Synchronous Operation Section of the MCF5307 User’s Manual. Because
the MCF5307 SDRAM controller can be continually re-programmed to support various SDRAM
configurations, this advantage can be leveraged to create a helper MUX that can support swapping of these
various SDRAMs in hardware.
128 MBytes
256 MBytes
512 MBytes
32 MBytes
128 MBytes
128 MBytes
256 MBytes
16 MBytes
16 MBytes
32 MBytes
64 MBytes
32 MBytes
64 MBytes
64 MBytes
One bank select line selects between two banks within the SDRAM component.
Denotes a double-sided module. The memory from only one side can be used due to the SDRAM controller
only supporting two CS signals.
Two bank select lines select between four banks within the SDRAM component.
Capacity
8 MBytes
2
2
2
2
# of Chips
Connecting the MCF5307 to 168-Pin Unbuffered SDRAM DIMMs
16
16
16
16
4
8
2
4
8
2
4
8
2
4
8
Freescale Semiconductor, Inc.
Chip Organization
For More Information On This Product,
16 Mbits X 16
1 Mbits X 16
2 Mbits X 32
4 Mbits X 16
16 Mbits X 4
4 Mbits X 32
8 Mbits X 16
16 Mbits X 8
32 Mbits X 4
8 Mbits X 32
32 Mbits X 8
64 Mbits X 4
2 Mbits X 8
4 Mbits X 4
8 Mbits X 8
Table 1. Example SDRAM DIMMs
Go to: www.freescale.com
Chip Density
128 Mbits
128 Mbits
128 Mbits
128 Mbits
256 Mbits
256 Mbits
256 Mbits
256 Mbits
16 Mbits
16 Mbits
16 Mbits
64 Mbits
64 Mbits
64 Mbits
64 Mbits
3
11 rows/8 columns/1 bank select
11 rows/9 columns/1 bank select
11 rows/10 columns/1 bank select
11 rows/8 columns/2 bank select
12 rows
12 rows/9 columns/2 bank select
12 rows/10 columns/2 bank select
12 rows/8 columns/2 bank select
12 rows/9 columns/2 bank select
12 rows/10 columns/2 bank select
12 rows/11 columns/2 bank select
13 rows/8 columns/2 bank select
13 rows/9 columns/2 bank select
13 rows/10 columns/2 bank select
13 rows/11 columns/2 bank select
Row/Column/Bank Select
2
/8 columns/2 bank select
Address Lines
1
1
3
3
3
3
3
3
3
1
3
3
3
3
3
3