M5307C3 Freescale Semiconductor, M5307C3 Datasheet - Page 72

• Manufacturer Part Number: M5307C3
• Description: KIT EVALUATION FOR MCF5307
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: Microprocessorr

Specifications of M5307C3

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MCF5307
• Interface Type: Ethernet
• For Use With/related Products: MCF5307
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Freescale Semiconductor, Inc.
CHAPTER 3
HARDWARE
DESCRIPTION
AND
RECONFIGURATION
This chapter provides a functional description of the
M5307C3
board hardware.
With the description given here and the schematic diagram provided at
the end
of this manual, the user can gain a good understanding of the board's design.
In this manual, an active low signal is indicated by a "-" preceding the signal
name in this text and a bar over the signal name in the schematics.
3.1
THE PROCESSOR AND SUPPORT LOGIC
This part of the Chapter discusses the CPU and general supporting logic on the
M5307C3 board.
3.1.1.
The
Processor
The microprocessor used in the M5307C3
is the highly integrated MCF5307,
32-bit processor.
The MCF5307 uses a ColdFire® processor
as the core with 8K
bytes of unified cache, two UART channels, two Timers, 4K bytes of SRAM,
2
Motorola M-Bus Module supporting the I
C, two-byte wide parallel I/O port,
and the supporting integrated system
logic. All the registers of the core
processor are 32 bits wide except for the Status Register (SR) which is 16 bits
wide. This processor communicates
with external devices over a 32-bit wide
data bus, D0-D31 with support for 8 and 16-bit ports.
This chip can
address 4 G
Bytes of memory
space using internal chip-select logic. All the processor's
signals are available through mictor connectors, LA1, LA2, LA3, LA4, LA5 and
through 100 mil headers J1, J3, J4, and J5.
Refer to section 3.7 for pin
assignment.
The MCF5307
has an IEEE JTAG-compatible port and BDM port used with third
party tools.
These signals are available
at port J1. The processor also has the
logic to generate up to eight (8) chip selects, -CS0 to -CS7, and support for 2
banks of ADRAM
(not on evaluation board) or 2 banks of SDRAM (on evaluation
board).
48
For More Information On This Product,
Go to: www.freescale.com