EVAL-AD7706EB Analog Devices Inc, EVAL-AD7706EB Datasheet - Page 25

• Manufacturer Part Number: EVAL-AD7706EB
• Description: BOARD EVAL FOR AD7706
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD7706EB

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 500
• Data Interface: Serial
• Inputs Per Adc: 3 Differential
• Input Range: 0 ~ 5.25 V
• Power (typ) @ Conditions: 6.5mW @ 500SPS
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7706
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

CONFIGURING THE AD7705/AD7706
The AD7705/AD7706 contains six on-chip registers that the
user can accesses via the serial interface. Communication with
any of these registers is initiated by writing to the Communica-
tions Register first. Figure 18 outlines a flow diagram of the
sequence used to configure all registers after a power-up or reset
on the AD7705, similar procedures apply to the AD7706. The
flowchart also shows two different read options—the first where
REV. A
WRITE TO COMMUNICATIONS REGISTER SETTING UP
NEXT OPERATION TO BE A READ FROM THE DATA
REGISTER (38 HEX)
WRITE TO COMMUNICATIONS REGISTER SELECTING
CHANNEL & SETTING UP NEXT OPERATION TO BE A
WRITE TO THE CLOCK REGISTER (20 HEX)
WRITE TO COMMUNICATIONS REGISTER SELECTING
CHANNEL & SETTING UP NEXT OPERATION TO BE A
WRITE TO THE SETUP REGISTER (10 HEX)
WRITE TO CLOCK REGISTER SETTING THE CLOCK
BITS IN ACCORDANCE WITH THE APPLIED MASTER
CLOCK SIGNAL AND SELECT UPDATE RATE FOR
SELECTED CHANNEL (0C HEX)
WRITE TO SETUP REGISTER CLEARING F SYNC,
SETTING UP GAIN, OPERATING CONDITIONS &
INITIATING A SELF-CALIBRATION ON SELECTED
CHANNEL (40 HEX)
CONFIGURE & INITIALIZE C/ P SERIAL PORT
POWER-ON/RESET FOR AD7705
READ FROM DATA REGISTER
Figure 18. Flowchart for Setting Up and Reading from the AD7705
NO
POLL DRDY PIN
START
DRDY
LOW?
YES
–25–
the DRDY pin is polled to determine when an update of the
data register has taken place, the second where the DRDY bit of
the Communications Register is interrogated to see if a data
register update has taken place. Also included in the flowing dia-
gram is a series of words that should be written to the registers
for a particular set of operating conditions. These conditions
are gain of one, no filter sync, bipolar mode, buffer off, clock of
4.9512 MHz and an output rate of 50 Hz.
WRITE TO COMMUNICATIONS REGISTER SETTING UP NEXT
OPERATION TO BE A READ FROM THE COMMUNICATIONS
REGISTER (08 HEX)
WRITE TO COMMUNICATIONS REGISTER SETTING UP
NEXT OPERATION TO BE A READ FROM THE DATA
REGISTER (38 HEX)
POLL DRDY BIT OF COMMUNICATIONS REGISTER
READ FROM COMMUNICATIONS REGISTER
READ FROM DATA REGISTER
NO
DRDY
LOW?
YES
AD7705/AD7706