C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet - Page 91

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C8051F310-TB

Manufacturer Part Number
C8051F310-TB
Description
BOARD PROTOTYPING W/C8051F310
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F310-TB

Contents
Board
Processor To Be Evaluated
C8051F31x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F310
Silicon Family Name
C8051F31x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F310
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Bits7–0: DPH: Data Pointer High.
Bits7–0: SP: Stack Pointer.
R/W
R/W
Bit7
Bit7
The DPH register is the high byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed Flash memory.
The Stack Pointer holds the location of the top of the stack. The stack pointer is incremented
before every PUSH operation. The SP register defaults to 0x07 after reset.
R/W
R/W
Bit6
Bit6
SFR Definition 8.2. DPH: Data Pointer High Byte
R/W
R/W
Bit5
Bit5
SFR Definition 8.3. SP: Stack Pointer
R/W
R/W
Bit4
Bit4
Rev. 1.7
R/W
R/W
Bit3
Bit3
C8051F310/1/2/3/4/5/6/7
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
00000000
Reset Value
00000111
Reset Value
0x81
0x83
91

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