C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet - Page 31
C8051F310-TB
Manufacturer Part Number
C8051F310-TB
Description
BOARD PROTOTYPING W/C8051F310
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F310-TB
Contents
Board
Processor To Be Evaluated
C8051F31x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F310
Silicon Family Name
C8051F31x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F310
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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1.4.
C8051F310/2/4 devices include 29 I/O pins (three byte-wide Ports and one 5-bit-wide Port);
C8051F311/3/5 devices include 25 I/O pins (three byte-wide Ports and one 1-bit-wide Port); C8051F316/7
devices include 21 I/O pins (one byte-wide Port, two 6-bit-wide Ports and one 1-bit-wide Port). The
C8051F31x Ports behave like typical 8051 Ports with a few enhancements. Each Port pin may be config-
ured as an analog input or a digital I/O pin. Pins selected as digital I/Os may additionally be configured for
push-pull or open-drain output. The “weak pullups” that are fixed on typical 8051 devices may be globally
disabled, providing power savings capabilities.
The Digital Crossbar allows mapping of internal digital system resources to Port I/O pins (See Figure 1.13).
On-chip counter/timers, serial buses, HW interrupts, comparator output, and other digital signals in the
controller can be configured to appear on the Port I/O pins specified in the Crossbar Control registers. This
allows the user to select the exact mix of general purpose Port I/O and digital resources needed for the
particular application.
Programmable Digital I/O and Crossbar
Highest
Priority
Lowest
Priority
SYSCLK
Outputs
Outputs
SMBus
UART
T0, T1
P0
P1
P2
P3
PCA
CP0
CP1
SPI
(P0.0-P0.7)
(P1.0-P1.7)
(P2.0-P2.3)
(P2.4-P2.7)
(P3.0-P3.4)
Figure 1.13. Digital Crossbar Diagram
2
4
2
2
2
6
2
8
8
4
4
5
Rev. 1.7
PnSKIP Registers
XBR0, XBR1,
Crossbar
Decoder
Priority
Digital
C8051F310/1/2/3/4/5/6/7
4
4
8
8
PnMDIN Registers
8
5
Notes:
1. P3.1–P3.4 only available on the
C8051F310/2/4.
2. P1.6, P1.7, P2.6, P2.7 only
available on the C8051F310/1/2/3/4/5
PnMDOUT,
Cells
Cells
Cells
Cells
I/O
I/O
I/O
I/O
P0
P1
P2
P3
P0.0
P1.0
P0.7
P1.7
P2.0
P2.7
P3.0
P3.4
31
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