C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet - Page 140
C8051F310-TB
Manufacturer Part Number
C8051F310-TB
Description
BOARD PROTOTYPING W/C8051F310
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F310-TB
Contents
Board
Processor To Be Evaluated
C8051F31x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F310
Silicon Family Name
C8051F31x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F310
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F310/1/2/3/4/5/6/7
140
Note:
Bits7–0: P2.[7:0]
Note:
Bits7–0: Analog Input Configuration Bits for P2.7–P2.0 (respectively).
P2.7
R/W
R/W
Bit7
Bit7
Only P2.0–P2.5 are associated with Port pins on the C8051F316/7 devices.
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P2MDOUT.n bit = 0).
Read - Always reads ‘1’ if selected as analog input in register P2MDIN. Directly reads Port
pin when configured as digital input.
0: P2.n pin is logic low.
1: P2.n pin is logic high.
Only P2.0–P2.5 are associated with Port pins on the C8051F316/7 devices.
Port pins configured as analog inputs have their weak pullup, digital driver, and digital
receiver disabled.
0: Corresponding P2.n pin is configured as an analog input.
1: Corresponding P2.n pin is not configured as an analog input.
P2.6
R/W
R/W
Bit6
Bit6
SFR Definition 13.12. P2MDIN: Port2 Input Mode
P2.5
R/W
R/W
Bit5
Bit5
SFR Definition 13.11. P2: Port2
P2.4
R/W
R/W
Bit4
Bit4
Rev. 1.7
P2.3
R/W
R/W
Bit3
Bit3
P2.2
R/W
R/W
Bit2
Bit2
P2.1
R/W
R/W
Bit1
Bit1
(bit addressable)
P2.0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
11111111
11111111
0xA0
0xF3
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